X-Git-Url: https://git.sur5r.net/?a=blobdiff_plain;f=include%2Fzynqmppl.h;h=fb5200ec84a615db9d791e59381e8d4f3062b673;hb=beb4d65e92ad091aefb1b5579ed839782ecb2008;hp=542ace9a03b9b6d9262bc64b0191c758e28cb500;hpb=cbe7706ab8aab06c18edaa9b120371f9c8012728;p=u-boot

diff --git a/include/zynqmppl.h b/include/zynqmppl.h
index 542ace9a03..fb5200ec84 100644
--- a/include/zynqmppl.h
+++ b/include/zynqmppl.h
@@ -16,6 +16,12 @@
 #define ZYNQMP_FPGA_OP_LOAD			(1 << 1)
 #define ZYNQMP_FPGA_OP_DONE			(1 << 2)
 
+#define ZYNQMP_CSU_IDCODE_DEVICE_CODE_SHIFT	15
+#define ZYNQMP_CSU_IDCODE_DEVICE_CODE_MASK	(0xf << \
+					ZYNQMP_CSU_IDCODE_DEVICE_CODE_SHIFT)
+#define ZYNQMP_CSU_IDCODE_SVD_SHIFT	12
+#define ZYNQMP_CSU_IDCODE_SVD_MASK	(0xe << ZYNQMP_CSU_IDCODE_SVD_SHIFT)
+
 extern struct xilinx_fpga_op zynqmp_op;
 
 #define XILINX_ZYNQMP_DESC \