X-Git-Url: https://git.sur5r.net/?a=blobdiff_plain;f=it87.c;h=8fb14b9d523998b743831ca09c560af85f0a1d74;hb=eba2fabe6fe5f423e2827296a01a2a6119a5a6f2;hp=4e01fd0e97c507832a77ff6c50d93b436e267cf0;hpb=13a3394e9584e4df2cfa0daf0b21dea1ea2b29ec;p=groeck-it87 diff --git a/it87.c b/it87.c index 4e01fd0..8fb14b9 100644 --- a/it87.c +++ b/it87.c @@ -16,6 +16,7 @@ * IT8620E Super I/O chip w/LPC interface * IT8622E Super I/O chip w/LPC interface * IT8623E Super I/O chip w/LPC interface + * IT8625E Super I/O chip w/LPC interface * IT8628E Super I/O chip w/LPC interface * IT8655E Super I/O chip w/LPC interface * IT8665E Super I/O chip w/LPC interface @@ -81,13 +82,18 @@ enum chips { it87, it8712, it8716, it8718, it8720, it8721, it8728, it8732, it8771, it8772, it8781, it8782, it8783, it8786, it8790, - it8792, it8603, it8607, it8613, it8620, it8622, it8628, it8655, it8665, - it8686 }; + it8792, it8603, it8607, it8613, it8620, it8622, it8625, it8628, + it8655, it8665, it8686 }; static unsigned short force_id; module_param(force_id, ushort, 0); MODULE_PARM_DESC(force_id, "Override the detected device ID"); +static unsigned short blacklist = 1; +module_param(blacklist, ushort, 0); +MODULE_PARM_DESC(blacklist, + "Enable/disable blacklist (1=enable, 0=disable, default 1)"); + static struct platform_device *it87_pdev[2]; static bool it87_sio4e_broken; #ifdef __IT87_USE_ACPI_MUTEX @@ -215,6 +221,7 @@ static inline void superio_exit(int ioreg) #define IT8620E_DEVID 0x8620 #define IT8622E_DEVID 0x8622 #define IT8623E_DEVID 0x8623 +#define IT8625E_DEVID 0x8625 #define IT8628E_DEVID 0x8628 #define IT8655E_DEVID 0x8655 #define IT8665E_DEVID 0x8665 @@ -357,6 +364,7 @@ struct it87_devices { const char * const suffix; u32 features; u8 num_temp_limit; + u8 num_temp_offset; u8 peci_mask; u8 old_peci_mask; }; @@ -365,7 +373,6 @@ struct it87_devices { #define FEAT_NEWER_AUTOPWM BIT(1) #define FEAT_OLD_AUTOPWM BIT(2) #define FEAT_16BIT_FANS BIT(3) -#define FEAT_TEMP_OFFSET BIT(4) #define FEAT_TEMP_PECI BIT(5) #define FEAT_TEMP_OLD_PECI BIT(6) #define FEAT_FAN16_CONFIG BIT(7) /* Need to enable 16-bit fans */ @@ -386,6 +393,7 @@ struct it87_devices { #define FEAT_SCALING BIT(22) /* Internal voltage scaling */ #define FEAT_FANCTL_ONOFF BIT(23) /* chip has FAN_CTL ON/OFF */ #define FEAT_11MV_ADC BIT(24) +#define FEAT_NEW_TEMPMAP BIT(25) /* new temp input selection */ static const struct it87_devices it87_devices[] = { [it87] = { @@ -394,6 +402,7 @@ static const struct it87_devices it87_devices[] = { .features = FEAT_OLD_AUTOPWM | FEAT_FANCTL_ONOFF, /* may need to overwrite */ .num_temp_limit = 3, + .num_temp_offset = 0, }, [it8712] = { .name = "it8712", @@ -401,41 +410,46 @@ static const struct it87_devices it87_devices[] = { .features = FEAT_OLD_AUTOPWM | FEAT_VID | FEAT_FANCTL_ONOFF, /* may need to overwrite */ .num_temp_limit = 3, + .num_temp_offset = 0, }, [it8716] = { .name = "it8716", .suffix = "F", - .features = FEAT_16BIT_FANS | FEAT_TEMP_OFFSET | FEAT_VID + .features = FEAT_16BIT_FANS | FEAT_VID | FEAT_FAN16_CONFIG | FEAT_FIVE_FANS | FEAT_PWM_FREQ2 | FEAT_FANCTL_ONOFF, .num_temp_limit = 3, + .num_temp_offset = 3, }, [it8718] = { .name = "it8718", .suffix = "F", - .features = FEAT_16BIT_FANS | FEAT_TEMP_OFFSET | FEAT_VID + .features = FEAT_16BIT_FANS | FEAT_VID | FEAT_TEMP_OLD_PECI | FEAT_FAN16_CONFIG | FEAT_FIVE_FANS | FEAT_PWM_FREQ2 | FEAT_FANCTL_ONOFF, .num_temp_limit = 3, + .num_temp_offset = 3, .old_peci_mask = 0x4, }, [it8720] = { .name = "it8720", .suffix = "F", - .features = FEAT_16BIT_FANS | FEAT_TEMP_OFFSET | FEAT_VID + .features = FEAT_16BIT_FANS | FEAT_VID | FEAT_TEMP_OLD_PECI | FEAT_FAN16_CONFIG | FEAT_FIVE_FANS | FEAT_PWM_FREQ2 | FEAT_FANCTL_ONOFF, .num_temp_limit = 3, + .num_temp_offset = 3, .old_peci_mask = 0x4, }, [it8721] = { .name = "it8721", .suffix = "F", .features = FEAT_NEWER_AUTOPWM | FEAT_12MV_ADC | FEAT_16BIT_FANS - | FEAT_TEMP_OFFSET | FEAT_TEMP_OLD_PECI | FEAT_TEMP_PECI + | FEAT_TEMP_OLD_PECI | FEAT_TEMP_PECI | FEAT_FAN16_CONFIG | FEAT_FIVE_FANS | FEAT_IN7_INTERNAL | FEAT_PWM_FREQ2 | FEAT_SCALING | FEAT_FANCTL_ONOFF, .num_temp_limit = 3, + .num_temp_offset = 3, .peci_mask = 0x05, .old_peci_mask = 0x02, /* Actually reports PCH */ }, @@ -443,20 +457,22 @@ static const struct it87_devices it87_devices[] = { .name = "it8728", .suffix = "F", .features = FEAT_NEWER_AUTOPWM | FEAT_12MV_ADC | FEAT_16BIT_FANS - | FEAT_TEMP_OFFSET | FEAT_TEMP_PECI | FEAT_FIVE_FANS + | FEAT_TEMP_PECI | FEAT_FIVE_FANS | FEAT_IN7_INTERNAL | FEAT_PWM_FREQ2 | FEAT_SCALING | FEAT_FANCTL_ONOFF, - .num_temp_limit = 3, + .num_temp_limit = 6, + .num_temp_offset = 3, .peci_mask = 0x07, }, [it8732] = { .name = "it8732", .suffix = "F", .features = FEAT_NEWER_AUTOPWM | FEAT_16BIT_FANS - | FEAT_TEMP_OFFSET | FEAT_TEMP_OLD_PECI | FEAT_TEMP_PECI + | FEAT_TEMP_OLD_PECI | FEAT_TEMP_PECI | FEAT_10_9MV_ADC | FEAT_IN7_INTERNAL | FEAT_FOUR_FANS | FEAT_FOUR_PWM | FEAT_FANCTL_ONOFF, .num_temp_limit = 3, + .num_temp_offset = 3, .peci_mask = 0x07, .old_peci_mask = 0x02, /* Actually reports PCH */ }, @@ -464,168 +480,195 @@ static const struct it87_devices it87_devices[] = { .name = "it8771", .suffix = "E", .features = FEAT_NEWER_AUTOPWM | FEAT_12MV_ADC | FEAT_16BIT_FANS - | FEAT_TEMP_OFFSET | FEAT_TEMP_PECI | FEAT_IN7_INTERNAL + | FEAT_TEMP_PECI | FEAT_IN7_INTERNAL | FEAT_PWM_FREQ2 | FEAT_SCALING | FEAT_FANCTL_ONOFF, /* PECI: guesswork */ /* 12mV ADC (OHM) */ /* 16 bit fans (OHM) */ /* three fans, always 16 bit (guesswork) */ .num_temp_limit = 3, + .num_temp_offset = 3, .peci_mask = 0x07, }, [it8772] = { .name = "it8772", .suffix = "E", .features = FEAT_NEWER_AUTOPWM | FEAT_12MV_ADC | FEAT_16BIT_FANS - | FEAT_TEMP_OFFSET | FEAT_TEMP_PECI | FEAT_IN7_INTERNAL + | FEAT_TEMP_PECI | FEAT_IN7_INTERNAL | FEAT_PWM_FREQ2 | FEAT_SCALING | FEAT_FANCTL_ONOFF, /* PECI (coreboot) */ /* 12mV ADC (HWSensors4, OHM) */ /* 16 bit fans (HWSensors4, OHM) */ /* three fans, always 16 bit (datasheet) */ .num_temp_limit = 3, + .num_temp_offset = 3, .peci_mask = 0x07, }, [it8781] = { .name = "it8781", .suffix = "F", - .features = FEAT_16BIT_FANS | FEAT_TEMP_OFFSET + .features = FEAT_16BIT_FANS | FEAT_TEMP_OLD_PECI | FEAT_FAN16_CONFIG | FEAT_PWM_FREQ2 | FEAT_FANCTL_ONOFF, .num_temp_limit = 3, + .num_temp_offset = 3, .old_peci_mask = 0x4, }, [it8782] = { .name = "it8782", .suffix = "F", - .features = FEAT_16BIT_FANS | FEAT_TEMP_OFFSET + .features = FEAT_16BIT_FANS | FEAT_TEMP_OLD_PECI | FEAT_FAN16_CONFIG | FEAT_PWM_FREQ2 | FEAT_FANCTL_ONOFF, .num_temp_limit = 3, + .num_temp_offset = 3, .old_peci_mask = 0x4, }, [it8783] = { .name = "it8783", .suffix = "E/F", - .features = FEAT_16BIT_FANS | FEAT_TEMP_OFFSET + .features = FEAT_16BIT_FANS | FEAT_TEMP_OLD_PECI | FEAT_FAN16_CONFIG | FEAT_PWM_FREQ2 | FEAT_FANCTL_ONOFF, .num_temp_limit = 3, + .num_temp_offset = 3, .old_peci_mask = 0x4, }, [it8786] = { .name = "it8786", .suffix = "E", .features = FEAT_NEWER_AUTOPWM | FEAT_12MV_ADC | FEAT_16BIT_FANS - | FEAT_TEMP_OFFSET | FEAT_TEMP_PECI | FEAT_IN7_INTERNAL + | FEAT_TEMP_PECI | FEAT_IN7_INTERNAL | FEAT_PWM_FREQ2 | FEAT_FANCTL_ONOFF, .num_temp_limit = 3, + .num_temp_offset = 3, .peci_mask = 0x07, }, [it8790] = { .name = "it8790", .suffix = "E", .features = FEAT_NEWER_AUTOPWM | FEAT_10_9MV_ADC | FEAT_SCALING - | FEAT_16BIT_FANS | FEAT_TEMP_OFFSET | FEAT_TEMP_PECI + | FEAT_16BIT_FANS | FEAT_TEMP_PECI | FEAT_IN7_INTERNAL | FEAT_PWM_FREQ2 | FEAT_FANCTL_ONOFF, .num_temp_limit = 3, + .num_temp_offset = 3, .peci_mask = 0x07, }, [it8792] = { .name = "it8792", .suffix = "E", .features = FEAT_NEWER_AUTOPWM | FEAT_10_9MV_ADC | FEAT_SCALING - | FEAT_16BIT_FANS | FEAT_TEMP_OFFSET | FEAT_TEMP_PECI + | FEAT_16BIT_FANS | FEAT_TEMP_PECI | FEAT_IN7_INTERNAL | FEAT_PWM_FREQ2 | FEAT_FANCTL_ONOFF, .num_temp_limit = 3, + .num_temp_offset = 3, .peci_mask = 0x07, }, [it8603] = { .name = "it8603", .suffix = "E", .features = FEAT_NEWER_AUTOPWM | FEAT_12MV_ADC | FEAT_16BIT_FANS - | FEAT_TEMP_OFFSET | FEAT_TEMP_PECI | FEAT_IN7_INTERNAL + | FEAT_TEMP_PECI | FEAT_IN7_INTERNAL | FEAT_AVCC3 | FEAT_PWM_FREQ2 | FEAT_SCALING, .num_temp_limit = 3, + .num_temp_offset = 3, .peci_mask = 0x07, }, [it8607] = { .name = "it8607", .suffix = "E", .features = FEAT_NEWER_AUTOPWM | FEAT_12MV_ADC | FEAT_16BIT_FANS - | FEAT_TEMP_OFFSET | FEAT_TEMP_PECI | FEAT_IN7_INTERNAL + | FEAT_TEMP_PECI | FEAT_IN7_INTERNAL | FEAT_AVCC3 | FEAT_PWM_FREQ2 | FEAT_SCALING | FEAT_FANCTL_ONOFF, .num_temp_limit = 3, + .num_temp_offset = 3, + .peci_mask = 0x07, + }, + [it8613] = { + .name = "it8613", + .suffix = "E", + .features = FEAT_NEWER_AUTOPWM | FEAT_11MV_ADC | FEAT_16BIT_FANS + | FEAT_TEMP_PECI | FEAT_FIVE_FANS + | FEAT_FIVE_PWM | FEAT_IN7_INTERNAL | FEAT_PWM_FREQ2 + | FEAT_AVCC3 | FEAT_SCALING | FEAT_NEW_TEMPMAP, + .num_temp_limit = 6, + .num_temp_offset = 6, .peci_mask = 0x07, }, - [it8613] = { - .name = "it8613", - .suffix = "E", - .features = FEAT_NEWER_AUTOPWM | FEAT_11MV_ADC | FEAT_16BIT_FANS - | FEAT_TEMP_OFFSET | FEAT_TEMP_PECI | FEAT_FIVE_FANS - | FEAT_FIVE_PWM | FEAT_IN7_INTERNAL | FEAT_PWM_FREQ2 - | FEAT_AVCC3 | FEAT_VIN3_5V | FEAT_SCALING, - .num_temp_limit = 3, - .peci_mask = 0x07, - }, [it8620] = { .name = "it8620", .suffix = "E", .features = FEAT_NEWER_AUTOPWM | FEAT_12MV_ADC | FEAT_16BIT_FANS - | FEAT_TEMP_OFFSET | FEAT_TEMP_PECI | FEAT_SIX_FANS + | FEAT_TEMP_PECI | FEAT_SIX_FANS | FEAT_IN7_INTERNAL | FEAT_SIX_PWM | FEAT_PWM_FREQ2 | FEAT_SIX_TEMP | FEAT_VIN3_5V | FEAT_SCALING | FEAT_FANCTL_ONOFF, .num_temp_limit = 3, + .num_temp_offset = 3, .peci_mask = 0x07, }, [it8622] = { .name = "it8622", .suffix = "E", .features = FEAT_NEWER_AUTOPWM | FEAT_12MV_ADC | FEAT_16BIT_FANS - | FEAT_TEMP_OFFSET | FEAT_TEMP_PECI | FEAT_FIVE_FANS + | FEAT_TEMP_PECI | FEAT_FIVE_FANS | FEAT_FIVE_PWM | FEAT_IN7_INTERNAL | FEAT_PWM_FREQ2 | FEAT_AVCC3 | FEAT_VIN3_5V | FEAT_SCALING, .num_temp_limit = 3, + .num_temp_offset = 3, .peci_mask = 0x07, }, + [it8625] = { + .name = "it8625", + .suffix = "E", + .features = FEAT_NEWER_AUTOPWM | FEAT_16BIT_FANS + | FEAT_AVCC3 | FEAT_NEW_TEMPMAP + | FEAT_11MV_ADC | FEAT_IN7_INTERNAL | FEAT_SIX_FANS + | FEAT_SIX_PWM | FEAT_BANK_SEL | FEAT_SCALING, + .num_temp_limit = 6, + .num_temp_offset = 6, + }, [it8628] = { .name = "it8628", .suffix = "E", .features = FEAT_NEWER_AUTOPWM | FEAT_12MV_ADC | FEAT_16BIT_FANS - | FEAT_TEMP_OFFSET | FEAT_TEMP_PECI | FEAT_SIX_FANS + | FEAT_TEMP_PECI | FEAT_SIX_FANS | FEAT_IN7_INTERNAL | FEAT_SIX_PWM | FEAT_PWM_FREQ2 | FEAT_SIX_TEMP | FEAT_SCALING | FEAT_AVCC3 | FEAT_FANCTL_ONOFF, - .num_temp_limit = 3, + .num_temp_limit = 6, + .num_temp_offset = 3, .peci_mask = 0x07, }, [it8655] = { .name = "it8655", .suffix = "E", .features = FEAT_NEWER_AUTOPWM | FEAT_16BIT_FANS - | FEAT_TEMP_OFFSET | FEAT_AVCC3 + | FEAT_AVCC3 | FEAT_NEW_TEMPMAP | FEAT_10_9MV_ADC | FEAT_IN7_INTERNAL | FEAT_BANK_SEL, .num_temp_limit = 6, + .num_temp_offset = 6, }, [it8665] = { .name = "it8665", .suffix = "E", .features = FEAT_NEWER_AUTOPWM | FEAT_16BIT_FANS - | FEAT_TEMP_OFFSET | FEAT_AVCC3 + | FEAT_AVCC3 | FEAT_NEW_TEMPMAP | FEAT_10_9MV_ADC | FEAT_IN7_INTERNAL | FEAT_SIX_FANS | FEAT_SIX_PWM | FEAT_BANK_SEL, .num_temp_limit = 6, + .num_temp_offset = 6, }, [it8686] = { .name = "it8686", .suffix = "E", .features = FEAT_NEWER_AUTOPWM | FEAT_12MV_ADC | FEAT_16BIT_FANS - | FEAT_TEMP_OFFSET | FEAT_SIX_FANS + | FEAT_SIX_FANS | FEAT_NEW_TEMPMAP | FEAT_IN7_INTERNAL | FEAT_SIX_PWM | FEAT_PWM_FREQ2 | FEAT_SIX_TEMP | FEAT_BANK_SEL | FEAT_SCALING | FEAT_AVCC3, .num_temp_limit = 6, + .num_temp_offset = 6, }, }; @@ -634,7 +677,6 @@ static const struct it87_devices it87_devices[] = { #define has_10_9mv_adc(data) ((data)->features & FEAT_10_9MV_ADC) #define has_newer_autopwm(data) ((data)->features & FEAT_NEWER_AUTOPWM) #define has_old_autopwm(data) ((data)->features & FEAT_OLD_AUTOPWM) -#define has_temp_offset(data) ((data)->features & FEAT_TEMP_OFFSET) #define has_temp_peci(data, nr) (((data)->features & FEAT_TEMP_PECI) && \ ((data)->peci_mask & BIT(nr))) #define has_temp_old_peci(data, nr) \ @@ -663,6 +705,7 @@ static const struct it87_devices it87_devices[] = { #define has_scaling(data) ((data)->features & FEAT_SCALING) #define has_fanctl_onoff(data) ((data)->features & FEAT_FANCTL_ONOFF) #define has_11mv_adc(data) ((data)->features & FEAT_11MV_ADC) +#define has_new_tempmap(data) ((data)->features & FEAT_NEW_TEMPMAP) struct it87_sio_data { enum chips type; @@ -716,7 +759,8 @@ struct it87_data { u16 fan[NUM_FAN][2]; /* Register values, [nr][0]=fan, [1]=min */ u8 has_temp; /* Bitfield, temp sensors enabled */ s8 temp[NUM_TEMP][4]; /* [nr][0]=temp, [1]=min, [2]=max, [3]=offset */ - u8 num_temp_limit; /* Number of temp limit/offset registers */ + u8 num_temp_limit; /* Number of temperature limit registers */ + u8 num_temp_offset; /* Number of temperature offset registers */ u8 sensor; /* Register value (IT87_REG_TEMP_ENABLE) */ u8 extra; /* Register value (IT87_REG_TEMP_EXTRA) */ u8 fan_div[NUM_FAN_DIV];/* Register encoding, shifted right */ @@ -900,7 +944,10 @@ static void it87_update_pwm_ctrl(struct it87_data *data, int nr) { data->pwm_ctrl[nr] = it87_read_value(data, data->REG_PWM[nr]); if (has_newer_autopwm(data)) { - data->pwm_temp_map[nr] = data->pwm_ctrl[nr] & 0x03; + if (has_new_tempmap(data)) + data->pwm_temp_map[nr] = data->pwm_ctrl[nr] & 0x38; + else + data->pwm_temp_map[nr] = data->pwm_ctrl[nr] & 0x03; data->pwm_duty[nr] = it87_read_value(data, IT87_REG_PWM_DUTY[nr]); } else { @@ -1006,7 +1053,7 @@ static struct it87_data *it87_update_device(struct device *dev) if (i >= data->num_temp_limit) continue; - if (has_temp_offset(data)) + if (i < data->num_temp_offset) data->temp[i][3] = it87_read_value(data, data->REG_TEMP_OFFSET[i]); @@ -1278,6 +1325,9 @@ static int get_temp_type(struct it87_data *data, int index) break; } break; + case it8625: + if (index < 3) + break; case it8655: case it8665: if (src1 < 3) { @@ -1751,10 +1801,16 @@ static ssize_t show_pwm_temp_map(struct device *dev, int map; map = data->pwm_temp_map[nr]; - if (map >= 3) - map = 0; /* Should never happen */ - if (nr >= 3) /* pwm channels 3..6 map to temp4..6 */ - map += 3; + if (has_new_tempmap(data)) { + map >>= 3; + if (map >= 6) + map = 0; /* Should never happen */ + } else { + if (map >= 3) + map = 0; /* Should never happen */ + if (nr >= 3) /* pwm channels 3..6 map to temp4..6 */ + map += 3; + } return sprintf(buf, "%d\n", (int)BIT(map)); } @@ -1772,7 +1828,7 @@ static ssize_t set_pwm_temp_map(struct device *dev, if (kstrtol(buf, 10, &val) < 0) return -EINVAL; - if (nr >= 3) + if (nr >= 3 && !has_new_tempmap(data)) val -= 3; switch (val) { @@ -1785,10 +1841,27 @@ static ssize_t set_pwm_temp_map(struct device *dev, case BIT(2): reg = 0x02; break; + case BIT(3): + reg = 0x03; + break; + case BIT(4): + reg = 0x04; + break; + case BIT(5): + reg = 0x05; + break; + case BIT(6): + reg = 0x06; + break; default: return -EINVAL; } + if (has_new_tempmap(data)) + reg <<= 3; + else if (reg > 0x02) + return -EINVAL; + mutex_lock(&data->update_lock); it87_update_pwm_ctrl(data, nr); data->pwm_temp_map[nr] = reg; @@ -1797,7 +1870,9 @@ static ssize_t set_pwm_temp_map(struct device *dev, * otherwise, just store it for later use. */ if (data->pwm_ctrl[nr] & 0x80) { - data->pwm_ctrl[nr] = (data->pwm_ctrl[nr] & 0xfc) | + u8 mask = has_new_tempmap(data) ? 0xc7 : 0xfc; + + data->pwm_ctrl[nr] = (data->pwm_ctrl[nr] & mask) | data->pwm_temp_map[nr]; it87_write_value(data, data->REG_PWM[nr], data->pwm_ctrl[nr]); } @@ -2394,7 +2469,7 @@ static umode_t it87_temp_is_visible(struct kobject *kobj, return attr->mode; } - if (a == 5 && !has_temp_offset(data)) + if (a == 5 && i >= data->num_temp_offset) return 0; if (a == 6 && !data->has_beep) @@ -2797,14 +2872,17 @@ static int __init it87_find(int sioaddr, unsigned short *address, sio_data->type = it8607; break; case IT8613E_DEVID: - sio_data->type = it8613; - break; + sio_data->type = it8613; + break; case IT8620E_DEVID: sio_data->type = it8620; break; case IT8622E_DEVID: sio_data->type = it8622; break; + case IT8625E_DEVID: + sio_data->type = it8625; + break; case IT8628E_DEVID: sio_data->type = it8628; break; @@ -2960,11 +3038,55 @@ static int __init it87_find(int sioaddr, unsigned short *address, if (reg29 & BIT(2)) sio_data->skip_fan |= BIT(1); - if (sio_data->type == it8603) { + switch (sio_data->type) { + case it8603: sio_data->skip_in |= BIT(5); /* No VIN5 */ sio_data->skip_in |= BIT(6); /* No VIN6 */ + break; + case it8607: + sio_data->skip_pwm |= BIT(0);/* No fan1 */ + sio_data->skip_fan |= BIT(0); + default: + break; } + sio_data->beep_pin = superio_inb(sioaddr, + IT87_SIO_BEEP_PIN_REG) & 0x3f; + } else if (sio_data->type == it8613) { + int reg27, reg29, reg2a; + + superio_select(sioaddr, GPIO); + + /* Check for pwm3, fan3, pwm5, fan5 */ + reg27 = superio_inb(sioaddr, IT87_SIO_GPIO3_REG); + if (reg27 & BIT(1)) + sio_data->skip_fan |= BIT(4); + if (reg27 & BIT(3)) + sio_data->skip_pwm |= BIT(4); + if (reg27 & BIT(6)) + sio_data->skip_pwm |= BIT(2); + if (reg27 & BIT(7)) + sio_data->skip_fan |= BIT(2); + + /* Check for pwm2, fan2 */ + reg29 = superio_inb(sioaddr, IT87_SIO_GPIO5_REG); + if (reg29 & BIT(1)) + sio_data->skip_pwm |= BIT(1); + if (reg29 & BIT(2)) + sio_data->skip_fan |= BIT(1); + + /* Check for pwm4, fan4 */ + reg2a = superio_inb(sioaddr, IT87_SIO_PINX1_REG); + if (!(reg2a & BIT(0)) || (reg29 & BIT(7))) { + sio_data->skip_fan |= BIT(3); + sio_data->skip_pwm |= BIT(3); + } + + sio_data->skip_pwm |= BIT(0); /* No pwm1 */ + sio_data->skip_fan |= BIT(0); /* No fan1 */ + sio_data->skip_in |= BIT(3); /* No VIN3 */ + sio_data->skip_in |= BIT(6); /* No VIN6 */ + sio_data->beep_pin = superio_inb(sioaddr, IT87_SIO_BEEP_PIN_REG) & 0x3f; } else if (sio_data->type == it8620 || sio_data->type == it8628 || @@ -3022,7 +3144,7 @@ static int __init it87_find(int sioaddr, unsigned short *address, sio_data->beep_pin = superio_inb(sioaddr, IT87_SIO_BEEP_PIN_REG) & 0x3f; - } else if (sio_data->type == it8613 || sio_data->type == it8622) { + } else if (sio_data->type == it8622) { int reg; superio_select(sioaddr, GPIO); @@ -3111,44 +3233,57 @@ static int __init it87_find(int sioaddr, unsigned short *address, sio_data->beep_pin = superio_inb(sioaddr, IT87_SIO_BEEP_PIN_REG) & 0x3f; - } else if (sio_data->type == it8665) { - int reg; + } else if (sio_data->type == it8665 || sio_data->type == it8625) { + int reg27, reg29, reg2d, regd3; superio_select(sioaddr, GPIO); - /* Check for pwm2 */ - reg = superio_inb(sioaddr, IT87_SIO_GPIO5_REG); - if (reg & BIT(1)) - sio_data->skip_pwm |= BIT(1); + reg27 = superio_inb(sioaddr, IT87_SIO_GPIO3_REG); + reg29 = superio_inb(sioaddr, IT87_SIO_GPIO5_REG); + reg2d = superio_inb(sioaddr, IT87_SIO_PINX4_REG); + regd3 = superio_inb(sioaddr, IT87_SIO_GPIO9_REG); - /* Check for fan2 */ - reg = superio_inb(sioaddr, IT87_SIO_PINX4_REG); - if (reg & BIT(4)) + /* Check for pwm2, fan2 */ + if (reg29 & BIT(1)) + sio_data->skip_pwm |= BIT(1); + if (reg2d & BIT(4)) sio_data->skip_fan |= BIT(1); /* Check for pwm3, fan3 */ - reg = superio_inb(sioaddr, IT87_SIO_GPIO3_REG); - if (reg & BIT(6)) + if (reg27 & BIT(6)) sio_data->skip_pwm |= BIT(2); - if (reg & BIT(7)) + if (reg27 & BIT(7)) sio_data->skip_fan |= BIT(2); - /* Check for pwm5, fan5 */ - reg = superio_inb(sioaddr, IT87_SIO_GPIO2_REG); - if (reg & BIT(5)) - sio_data->skip_pwm |= BIT(4); - if (!(reg & BIT(4))) - sio_data->skip_fan |= BIT(4); + /* Check for pwm4, fan4, pwm5, fan5 */ + if (sio_data->type == it8625) { + int reg25 = superio_inb(sioaddr, IT87_SIO_GPIO1_REG); + + if (reg25 & BIT(6)) + sio_data->skip_fan |= BIT(3); + if (reg25 & BIT(5)) + sio_data->skip_pwm |= BIT(3); + if (reg27 & BIT(3)) + sio_data->skip_pwm |= BIT(4); + if (reg27 & BIT(1)) + sio_data->skip_fan |= BIT(4); + } else { + int reg26 = superio_inb(sioaddr, IT87_SIO_GPIO2_REG); + + if (regd3 & BIT(2)) + sio_data->skip_pwm |= BIT(3); + if (regd3 & BIT(3)) + sio_data->skip_fan |= BIT(3); + if (reg26 & BIT(5)) + sio_data->skip_pwm |= BIT(4); + if (!(reg26 & BIT(4))) + sio_data->skip_fan |= BIT(4); + } - /* Check for pwm4, fan4, pwm6, fan6 */ - reg = superio_inb(sioaddr, IT87_SIO_GPIO9_REG); - if (reg & BIT(2)) - sio_data->skip_pwm |= BIT(3); - if (reg & BIT(3)) - sio_data->skip_fan |= BIT(3); - if (reg & BIT(0)) + /* Check for pwm6, fan6 */ + if (regd3 & BIT(0)) sio_data->skip_pwm |= BIT(5); - if (reg & BIT(1)) + if (regd3 & BIT(1)) sio_data->skip_fan |= BIT(5); sio_data->beep_pin = superio_inb(sioaddr, @@ -3262,16 +3397,13 @@ exit: return err; } -/* Called when we have found a new IT87. */ -static void it87_init_device(struct platform_device *pdev) +static void it87_init_regs(struct platform_device *pdev) { - struct it87_sio_data *sio_data = dev_get_platdata(&pdev->dev); struct it87_data *data = platform_get_drvdata(pdev); - int tmp, i; - u8 mask; /* Initialize chip specific register pointers */ switch (data->type) { + case it8628: case it8686: data->REG_FAN = IT87_REG_FAN; data->REG_FANX = IT87_REG_FANX; @@ -3282,6 +3414,7 @@ static void it87_init_device(struct platform_device *pdev) data->REG_TEMP_LOW = IT87_REG_TEMP_LOW_8686; data->REG_TEMP_HIGH = IT87_REG_TEMP_HIGH_8686; break; + case it8625: case it8655: case it8665: data->REG_FAN = IT87_REG_FAN_8665; @@ -3304,15 +3437,15 @@ static void it87_init_device(struct platform_device *pdev) data->REG_TEMP_HIGH = IT87_REG_TEMP_HIGH; break; case it8613: - data->REG_FAN = IT87_REG_FAN; - data->REG_FANX = IT87_REG_FANX; - data->REG_FAN_MIN = IT87_REG_FAN_MIN; - data->REG_FANX_MIN = IT87_REG_FANX_MIN; - data->REG_PWM = IT87_REG_PWM_8665; - data->REG_TEMP_OFFSET = IT87_REG_TEMP_OFFSET; - data->REG_TEMP_LOW = IT87_REG_TEMP_LOW; - data->REG_TEMP_HIGH = IT87_REG_TEMP_HIGH; - break; + data->REG_FAN = IT87_REG_FAN; + data->REG_FANX = IT87_REG_FANX; + data->REG_FAN_MIN = IT87_REG_FAN_MIN; + data->REG_FANX_MIN = IT87_REG_FANX_MIN; + data->REG_PWM = IT87_REG_PWM_8665; + data->REG_TEMP_OFFSET = IT87_REG_TEMP_OFFSET; + data->REG_TEMP_LOW = IT87_REG_TEMP_LOW; + data->REG_TEMP_HIGH = IT87_REG_TEMP_HIGH; + break; default: data->REG_FAN = IT87_REG_FAN; data->REG_FANX = IT87_REG_FANX; @@ -3324,6 +3457,15 @@ static void it87_init_device(struct platform_device *pdev) data->REG_TEMP_HIGH = IT87_REG_TEMP_HIGH; break; } +} + +/* Called when we have found a new IT87. */ +static void it87_init_device(struct platform_device *pdev) +{ + struct it87_sio_data *sio_data = dev_get_platdata(&pdev->dev); + struct it87_data *data = platform_get_drvdata(pdev); + int tmp, i; + u8 mask; /* * For each PWM channel: @@ -3412,6 +3554,7 @@ static void it87_init_device(struct platform_device *pdev) if (tmp & BIT(2)) data->has_fan |= BIT(5); /* fan6 enabled */ break; + case it8625: case it8665: tmp = it87_read_value(data, IT87_REG_FAN_DIV); if (tmp & BIT(3)) @@ -3529,6 +3672,7 @@ static int it87_probe(struct platform_device *pdev) data->type = sio_data->type; data->features = it87_devices[sio_data->type].features; data->num_temp_limit = it87_devices[sio_data->type].num_temp_limit; + data->num_temp_offset = it87_devices[sio_data->type].num_temp_offset; data->peci_mask = it87_devices[sio_data->type].peci_mask; data->old_peci_mask = it87_devices[sio_data->type].old_peci_mask; data->bank = 0xff; @@ -3565,6 +3709,9 @@ static int it87_probe(struct platform_device *pdev) mutex_init(&data->update_lock); + /* Initialize register pointers */ + it87_init_regs(pdev); + /* Check PWM configuration */ enable_pwm_interface = it87_check_pwm(dev); @@ -3746,6 +3893,13 @@ static const struct dmi_system_id it87_dmi_table[] __initconst = { }, .driver_data = &gigabyte_ab350_gaming, }, + { + .matches = { + DMI_MATCH(DMI_SYS_VENDOR, "Gigabyte Technology Co., Ltd."), + DMI_MATCH(DMI_BOARD_NAME, "AB350M-D3H-CF"), + }, + .driver_data = &gigabyte_ab350_gaming, + }, { .matches = { DMI_MATCH(DMI_SYS_VENDOR, "Gigabyte Technology Co., Ltd."), @@ -3753,6 +3907,13 @@ static const struct dmi_system_id it87_dmi_table[] __initconst = { }, .driver_data = &gigabyte_ab350_gaming, }, + { + .matches = { + DMI_MATCH(DMI_SYS_VENDOR, "Gigabyte Technology Co., Ltd."), + DMI_MATCH(DMI_BOARD_NAME, "AX370-Gaming 5"), + }, + .driver_data = &gigabyte_ab350_gaming, + }, { .matches = { DMI_MATCH(DMI_BOARD_VENDOR, "nVIDIA"), @@ -3802,10 +3963,10 @@ static int __init sm_it87_init(void) for (i = 0; i < ARRAY_SIZE(sioaddr); i++) { /* - * Accessing the second Super-IO chi can result in board + * Accessing the second Super-IO chip can result in board * hangs. Disable until we figure out what is going on. */ - if (it87_sio4e_broken && sioaddr[i] == 0x4e) + if (blacklist && it87_sio4e_broken && sioaddr[i] == 0x4e) continue; memset(&sio_data, 0, sizeof(struct it87_sio_data)); isa_address = 0;