X-Git-Url: https://git.sur5r.net/?a=blobdiff_plain;f=it87.c;h=9bb5d5b3761d5603f3ee2befcf2f97b5bfe1221c;hb=c01952b9ca87c2127bd97e194a654979dd842ceb;hp=930b81ed77163036de6627228807a6a4c780b08f;hpb=ab6262dbaaac9ab5d74d3918ad64ae56d11c6ed4;p=groeck-it87 diff --git a/it87.c b/it87.c index 930b81e..9bb5d5b 100644 --- a/it87.c +++ b/it87.c @@ -77,9 +77,6 @@ #define DRVNAME "it87" -/* Necessary API not (yet) exported in upstream kernel */ -/* #define __IT87_USE_ACPI_MUTEX */ - enum chips { it87, it8712, it8716, it8718, it8720, it8721, it8728, it8732, it8771, it8772, it8781, it8782, it8783, it8786, it8790, it8792, it8603, it8607, it8613, it8620, it8622, it8625, it8628, @@ -89,17 +86,7 @@ static unsigned short force_id; module_param(force_id, ushort, 0); MODULE_PARM_DESC(force_id, "Override the detected device ID"); -static unsigned short blacklist = 1; -module_param(blacklist, ushort, 0); -MODULE_PARM_DESC(blacklist, - "Enable/disable blacklist (1=enable, 0=disable, default 1)"); - static struct platform_device *it87_pdev[2]; -static bool it87_sio4e_broken; -#ifdef __IT87_USE_ACPI_MUTEX -static acpi_handle it87_acpi_sio_handle; -static char *it87_acpi_sio_mutex; -#endif #define REG_2E 0x2e /* The register to read/write */ #define REG_4E 0x4e /* Secondary register to read/write */ @@ -127,12 +114,6 @@ static inline int superio_inb(int ioreg, int reg) outb(reg, ioreg); val = inb(ioreg + 1); - if (it87_sio4e_broken && ioreg == 0x4e && val == 0xff) { - __superio_enter(ioreg); - outb(reg, ioreg); - val = inb(ioreg + 1); - pr_warn("Retry access 0x4e:0x%x -> 0x%x\n", reg, val); - } return val; } @@ -156,17 +137,6 @@ static inline void superio_select(int ioreg, int ldn) static inline int superio_enter(int ioreg) { -#ifdef __IT87_USE_ACPI_MUTEX - if (it87_acpi_sio_mutex) { - acpi_status status; - - status = acpi_acquire_mutex(NULL, it87_acpi_sio_mutex, 0x10); - if (ACPI_FAILURE(status)) { - pr_err("Failed to acquire ACPI mutex\n"); - return -EBUSY; - } - } -#endif /* * Try to reserve ioreg and ioreg + 1 for exclusive access. */ @@ -177,24 +147,16 @@ static inline int superio_enter(int ioreg) return 0; error: -#ifdef __IT87_USE_ACPI_MUTEX - if (it87_acpi_sio_mutex) - acpi_release_mutex(it87_acpi_sio_handle, NULL); -#endif return -EBUSY; } -static inline void superio_exit(int ioreg) +static inline void superio_exit(int ioreg, bool doexit) { - if (!it87_sio4e_broken || ioreg != 0x4e) { + if (doexit) { outb(0x02, ioreg); outb(0x02, ioreg + 1); } release_region(ioreg, 2); -#ifdef __IT87_USE_ACPI_MUTEX - if (it87_acpi_sio_mutex) - acpi_release_mutex(it87_acpi_sio_handle, NULL); -#endif } /* Logical device 4 registers */ @@ -364,6 +326,7 @@ struct it87_devices { const char * const suffix; u32 features; u8 num_temp_limit; + u8 num_temp_offset; u8 peci_mask; u8 old_peci_mask; }; @@ -372,7 +335,6 @@ struct it87_devices { #define FEAT_NEWER_AUTOPWM BIT(1) #define FEAT_OLD_AUTOPWM BIT(2) #define FEAT_16BIT_FANS BIT(3) -#define FEAT_TEMP_OFFSET BIT(4) #define FEAT_TEMP_PECI BIT(5) #define FEAT_TEMP_OLD_PECI BIT(6) #define FEAT_FAN16_CONFIG BIT(7) /* Need to enable 16-bit fans */ @@ -402,6 +364,7 @@ static const struct it87_devices it87_devices[] = { .features = FEAT_OLD_AUTOPWM | FEAT_FANCTL_ONOFF, /* may need to overwrite */ .num_temp_limit = 3, + .num_temp_offset = 0, }, [it8712] = { .name = "it8712", @@ -409,41 +372,46 @@ static const struct it87_devices it87_devices[] = { .features = FEAT_OLD_AUTOPWM | FEAT_VID | FEAT_FANCTL_ONOFF, /* may need to overwrite */ .num_temp_limit = 3, + .num_temp_offset = 0, }, [it8716] = { .name = "it8716", .suffix = "F", - .features = FEAT_16BIT_FANS | FEAT_TEMP_OFFSET | FEAT_VID + .features = FEAT_16BIT_FANS | FEAT_VID | FEAT_FAN16_CONFIG | FEAT_FIVE_FANS | FEAT_PWM_FREQ2 | FEAT_FANCTL_ONOFF, .num_temp_limit = 3, + .num_temp_offset = 3, }, [it8718] = { .name = "it8718", .suffix = "F", - .features = FEAT_16BIT_FANS | FEAT_TEMP_OFFSET | FEAT_VID + .features = FEAT_16BIT_FANS | FEAT_VID | FEAT_TEMP_OLD_PECI | FEAT_FAN16_CONFIG | FEAT_FIVE_FANS | FEAT_PWM_FREQ2 | FEAT_FANCTL_ONOFF, .num_temp_limit = 3, + .num_temp_offset = 3, .old_peci_mask = 0x4, }, [it8720] = { .name = "it8720", .suffix = "F", - .features = FEAT_16BIT_FANS | FEAT_TEMP_OFFSET | FEAT_VID + .features = FEAT_16BIT_FANS | FEAT_VID | FEAT_TEMP_OLD_PECI | FEAT_FAN16_CONFIG | FEAT_FIVE_FANS | FEAT_PWM_FREQ2 | FEAT_FANCTL_ONOFF, .num_temp_limit = 3, + .num_temp_offset = 3, .old_peci_mask = 0x4, }, [it8721] = { .name = "it8721", .suffix = "F", .features = FEAT_NEWER_AUTOPWM | FEAT_12MV_ADC | FEAT_16BIT_FANS - | FEAT_TEMP_OFFSET | FEAT_TEMP_OLD_PECI | FEAT_TEMP_PECI + | FEAT_TEMP_OLD_PECI | FEAT_TEMP_PECI | FEAT_FAN16_CONFIG | FEAT_FIVE_FANS | FEAT_IN7_INTERNAL | FEAT_PWM_FREQ2 | FEAT_SCALING | FEAT_FANCTL_ONOFF, .num_temp_limit = 3, + .num_temp_offset = 3, .peci_mask = 0x05, .old_peci_mask = 0x02, /* Actually reports PCH */ }, @@ -451,20 +419,22 @@ static const struct it87_devices it87_devices[] = { .name = "it8728", .suffix = "F", .features = FEAT_NEWER_AUTOPWM | FEAT_12MV_ADC | FEAT_16BIT_FANS - | FEAT_TEMP_OFFSET | FEAT_TEMP_PECI | FEAT_FIVE_FANS + | FEAT_TEMP_PECI | FEAT_FIVE_FANS | FEAT_IN7_INTERNAL | FEAT_PWM_FREQ2 | FEAT_SCALING | FEAT_FANCTL_ONOFF, - .num_temp_limit = 3, + .num_temp_limit = 6, + .num_temp_offset = 3, .peci_mask = 0x07, }, [it8732] = { .name = "it8732", .suffix = "F", .features = FEAT_NEWER_AUTOPWM | FEAT_16BIT_FANS - | FEAT_TEMP_OFFSET | FEAT_TEMP_OLD_PECI | FEAT_TEMP_PECI + | FEAT_TEMP_OLD_PECI | FEAT_TEMP_PECI | FEAT_10_9MV_ADC | FEAT_IN7_INTERNAL | FEAT_FOUR_FANS | FEAT_FOUR_PWM | FEAT_FANCTL_ONOFF, .num_temp_limit = 3, + .num_temp_offset = 3, .peci_mask = 0x07, .old_peci_mask = 0x02, /* Actually reports PCH */ }, @@ -472,177 +442,195 @@ static const struct it87_devices it87_devices[] = { .name = "it8771", .suffix = "E", .features = FEAT_NEWER_AUTOPWM | FEAT_12MV_ADC | FEAT_16BIT_FANS - | FEAT_TEMP_OFFSET | FEAT_TEMP_PECI | FEAT_IN7_INTERNAL + | FEAT_TEMP_PECI | FEAT_IN7_INTERNAL | FEAT_PWM_FREQ2 | FEAT_SCALING | FEAT_FANCTL_ONOFF, /* PECI: guesswork */ /* 12mV ADC (OHM) */ /* 16 bit fans (OHM) */ /* three fans, always 16 bit (guesswork) */ .num_temp_limit = 3, + .num_temp_offset = 3, .peci_mask = 0x07, }, [it8772] = { .name = "it8772", .suffix = "E", .features = FEAT_NEWER_AUTOPWM | FEAT_12MV_ADC | FEAT_16BIT_FANS - | FEAT_TEMP_OFFSET | FEAT_TEMP_PECI | FEAT_IN7_INTERNAL + | FEAT_TEMP_PECI | FEAT_IN7_INTERNAL | FEAT_PWM_FREQ2 | FEAT_SCALING | FEAT_FANCTL_ONOFF, /* PECI (coreboot) */ /* 12mV ADC (HWSensors4, OHM) */ /* 16 bit fans (HWSensors4, OHM) */ /* three fans, always 16 bit (datasheet) */ .num_temp_limit = 3, + .num_temp_offset = 3, .peci_mask = 0x07, }, [it8781] = { .name = "it8781", .suffix = "F", - .features = FEAT_16BIT_FANS | FEAT_TEMP_OFFSET + .features = FEAT_16BIT_FANS | FEAT_TEMP_OLD_PECI | FEAT_FAN16_CONFIG | FEAT_PWM_FREQ2 | FEAT_FANCTL_ONOFF, .num_temp_limit = 3, + .num_temp_offset = 3, .old_peci_mask = 0x4, }, [it8782] = { .name = "it8782", .suffix = "F", - .features = FEAT_16BIT_FANS | FEAT_TEMP_OFFSET + .features = FEAT_16BIT_FANS | FEAT_TEMP_OLD_PECI | FEAT_FAN16_CONFIG | FEAT_PWM_FREQ2 | FEAT_FANCTL_ONOFF, .num_temp_limit = 3, + .num_temp_offset = 3, .old_peci_mask = 0x4, }, [it8783] = { .name = "it8783", .suffix = "E/F", - .features = FEAT_16BIT_FANS | FEAT_TEMP_OFFSET + .features = FEAT_16BIT_FANS | FEAT_TEMP_OLD_PECI | FEAT_FAN16_CONFIG | FEAT_PWM_FREQ2 | FEAT_FANCTL_ONOFF, .num_temp_limit = 3, + .num_temp_offset = 3, .old_peci_mask = 0x4, }, [it8786] = { .name = "it8786", .suffix = "E", .features = FEAT_NEWER_AUTOPWM | FEAT_12MV_ADC | FEAT_16BIT_FANS - | FEAT_TEMP_OFFSET | FEAT_TEMP_PECI | FEAT_IN7_INTERNAL + | FEAT_TEMP_PECI | FEAT_IN7_INTERNAL | FEAT_PWM_FREQ2 | FEAT_FANCTL_ONOFF, .num_temp_limit = 3, + .num_temp_offset = 3, .peci_mask = 0x07, }, [it8790] = { .name = "it8790", .suffix = "E", .features = FEAT_NEWER_AUTOPWM | FEAT_10_9MV_ADC | FEAT_SCALING - | FEAT_16BIT_FANS | FEAT_TEMP_OFFSET | FEAT_TEMP_PECI + | FEAT_16BIT_FANS | FEAT_TEMP_PECI | FEAT_IN7_INTERNAL | FEAT_PWM_FREQ2 | FEAT_FANCTL_ONOFF, .num_temp_limit = 3, + .num_temp_offset = 3, .peci_mask = 0x07, }, [it8792] = { .name = "it8792", .suffix = "E", .features = FEAT_NEWER_AUTOPWM | FEAT_10_9MV_ADC | FEAT_SCALING - | FEAT_16BIT_FANS | FEAT_TEMP_OFFSET | FEAT_TEMP_PECI + | FEAT_16BIT_FANS | FEAT_TEMP_PECI | FEAT_IN7_INTERNAL | FEAT_PWM_FREQ2 | FEAT_FANCTL_ONOFF, .num_temp_limit = 3, + .num_temp_offset = 3, .peci_mask = 0x07, }, [it8603] = { .name = "it8603", .suffix = "E", .features = FEAT_NEWER_AUTOPWM | FEAT_12MV_ADC | FEAT_16BIT_FANS - | FEAT_TEMP_OFFSET | FEAT_TEMP_PECI | FEAT_IN7_INTERNAL + | FEAT_TEMP_PECI | FEAT_IN7_INTERNAL | FEAT_AVCC3 | FEAT_PWM_FREQ2 | FEAT_SCALING, .num_temp_limit = 3, + .num_temp_offset = 3, .peci_mask = 0x07, }, [it8607] = { .name = "it8607", .suffix = "E", .features = FEAT_NEWER_AUTOPWM | FEAT_12MV_ADC | FEAT_16BIT_FANS - | FEAT_TEMP_OFFSET | FEAT_TEMP_PECI | FEAT_IN7_INTERNAL + | FEAT_TEMP_PECI | FEAT_IN7_INTERNAL | FEAT_AVCC3 | FEAT_PWM_FREQ2 | FEAT_SCALING | FEAT_FANCTL_ONOFF, .num_temp_limit = 3, + .num_temp_offset = 3, .peci_mask = 0x07, }, [it8613] = { .name = "it8613", .suffix = "E", .features = FEAT_NEWER_AUTOPWM | FEAT_11MV_ADC | FEAT_16BIT_FANS - | FEAT_TEMP_OFFSET | FEAT_TEMP_PECI | FEAT_FIVE_FANS + | FEAT_TEMP_PECI | FEAT_FIVE_FANS | FEAT_FIVE_PWM | FEAT_IN7_INTERNAL | FEAT_PWM_FREQ2 | FEAT_AVCC3 | FEAT_SCALING | FEAT_NEW_TEMPMAP, .num_temp_limit = 6, + .num_temp_offset = 6, .peci_mask = 0x07, }, [it8620] = { .name = "it8620", .suffix = "E", .features = FEAT_NEWER_AUTOPWM | FEAT_12MV_ADC | FEAT_16BIT_FANS - | FEAT_TEMP_OFFSET | FEAT_TEMP_PECI | FEAT_SIX_FANS + | FEAT_TEMP_PECI | FEAT_SIX_FANS | FEAT_IN7_INTERNAL | FEAT_SIX_PWM | FEAT_PWM_FREQ2 | FEAT_SIX_TEMP | FEAT_VIN3_5V | FEAT_SCALING | FEAT_FANCTL_ONOFF, .num_temp_limit = 3, + .num_temp_offset = 3, .peci_mask = 0x07, }, [it8622] = { .name = "it8622", .suffix = "E", .features = FEAT_NEWER_AUTOPWM | FEAT_12MV_ADC | FEAT_16BIT_FANS - | FEAT_TEMP_OFFSET | FEAT_TEMP_PECI | FEAT_FIVE_FANS + | FEAT_TEMP_PECI | FEAT_FIVE_FANS | FEAT_FIVE_PWM | FEAT_IN7_INTERNAL | FEAT_PWM_FREQ2 | FEAT_AVCC3 | FEAT_VIN3_5V | FEAT_SCALING, .num_temp_limit = 3, + .num_temp_offset = 3, .peci_mask = 0x07, }, [it8625] = { .name = "it8625", .suffix = "E", .features = FEAT_NEWER_AUTOPWM | FEAT_16BIT_FANS - | FEAT_TEMP_OFFSET | FEAT_AVCC3 | FEAT_NEW_TEMPMAP + | FEAT_AVCC3 | FEAT_NEW_TEMPMAP | FEAT_11MV_ADC | FEAT_IN7_INTERNAL | FEAT_SIX_FANS | FEAT_SIX_PWM | FEAT_BANK_SEL | FEAT_SCALING, .num_temp_limit = 6, + .num_temp_offset = 6, }, [it8628] = { .name = "it8628", .suffix = "E", .features = FEAT_NEWER_AUTOPWM | FEAT_12MV_ADC | FEAT_16BIT_FANS - | FEAT_TEMP_OFFSET | FEAT_TEMP_PECI | FEAT_SIX_FANS + | FEAT_TEMP_PECI | FEAT_SIX_FANS | FEAT_IN7_INTERNAL | FEAT_SIX_PWM | FEAT_PWM_FREQ2 | FEAT_SIX_TEMP | FEAT_SCALING | FEAT_AVCC3 | FEAT_FANCTL_ONOFF, - .num_temp_limit = 3, + .num_temp_limit = 6, + .num_temp_offset = 3, .peci_mask = 0x07, }, [it8655] = { .name = "it8655", .suffix = "E", .features = FEAT_NEWER_AUTOPWM | FEAT_16BIT_FANS - | FEAT_TEMP_OFFSET | FEAT_AVCC3 | FEAT_NEW_TEMPMAP + | FEAT_AVCC3 | FEAT_NEW_TEMPMAP | FEAT_SCALING | FEAT_10_9MV_ADC | FEAT_IN7_INTERNAL | FEAT_BANK_SEL, .num_temp_limit = 6, + .num_temp_offset = 6, }, [it8665] = { .name = "it8665", .suffix = "E", .features = FEAT_NEWER_AUTOPWM | FEAT_16BIT_FANS - | FEAT_TEMP_OFFSET | FEAT_AVCC3 | FEAT_NEW_TEMPMAP + | FEAT_AVCC3 | FEAT_NEW_TEMPMAP | FEAT_SCALING | FEAT_10_9MV_ADC | FEAT_IN7_INTERNAL | FEAT_SIX_FANS | FEAT_SIX_PWM | FEAT_BANK_SEL, .num_temp_limit = 6, + .num_temp_offset = 6, }, [it8686] = { .name = "it8686", .suffix = "E", .features = FEAT_NEWER_AUTOPWM | FEAT_12MV_ADC | FEAT_16BIT_FANS - | FEAT_TEMP_OFFSET | FEAT_SIX_FANS | FEAT_NEW_TEMPMAP + | FEAT_SIX_FANS | FEAT_NEW_TEMPMAP | FEAT_IN7_INTERNAL | FEAT_SIX_PWM | FEAT_PWM_FREQ2 | FEAT_SIX_TEMP | FEAT_BANK_SEL | FEAT_SCALING | FEAT_AVCC3, .num_temp_limit = 6, + .num_temp_offset = 6, }, }; @@ -651,7 +639,6 @@ static const struct it87_devices it87_devices[] = { #define has_10_9mv_adc(data) ((data)->features & FEAT_10_9MV_ADC) #define has_newer_autopwm(data) ((data)->features & FEAT_NEWER_AUTOPWM) #define has_old_autopwm(data) ((data)->features & FEAT_OLD_AUTOPWM) -#define has_temp_offset(data) ((data)->features & FEAT_TEMP_OFFSET) #define has_temp_peci(data, nr) (((data)->features & FEAT_TEMP_PECI) && \ ((data)->peci_mask & BIT(nr))) #define has_temp_old_peci(data, nr) \ @@ -734,7 +721,8 @@ struct it87_data { u16 fan[NUM_FAN][2]; /* Register values, [nr][0]=fan, [1]=min */ u8 has_temp; /* Bitfield, temp sensors enabled */ s8 temp[NUM_TEMP][4]; /* [nr][0]=temp, [1]=min, [2]=max, [3]=offset */ - u8 num_temp_limit; /* Number of temp limit/offset registers */ + u8 num_temp_limit; /* Number of temperature limit registers */ + u8 num_temp_offset; /* Number of temperature offset registers */ u8 sensor; /* Register value (IT87_REG_TEMP_ENABLE) */ u8 extra; /* Register value (IT87_REG_TEMP_EXTRA) */ u8 fan_div[NUM_FAN_DIV];/* Register encoding, shifted right */ @@ -1027,7 +1015,7 @@ static struct it87_data *it87_update_device(struct device *dev) if (i >= data->num_temp_limit) continue; - if (has_temp_offset(data)) + if (i < data->num_temp_offset) data->temp[i][3] = it87_read_value(data, data->REG_TEMP_OFFSET[i]); @@ -2443,7 +2431,7 @@ static umode_t it87_temp_is_visible(struct kobject *kobj, return attr->mode; } - if (a == 5 && !has_temp_offset(data)) + if (a == 5 && i >= data->num_temp_offset) return 0; if (a == 6 && !data->has_beep) @@ -2772,9 +2760,10 @@ static const struct attribute_group it87_group_auto_pwm = { static int __init it87_find(int sioaddr, unsigned short *address, struct it87_sio_data *sio_data) { - int err; - u16 chip_type; const struct it87_devices *config; + bool doexit = true; + u16 chip_type; + int err; err = superio_enter(sioaddr); if (err) @@ -2816,6 +2805,13 @@ static int __init it87_find(int sioaddr, unsigned short *address, break; case IT8792E_DEVID: sio_data->type = it8792; + /* + * Disabling configuration mode on IT8792E can result in system + * hang-ups and access failures to the Super-IO chip at the + * second SIO address. Never exit configuration mode on this + * chip to avoid the problem. + */ + doexit = false; break; case IT8771E_DEVID: sio_data->type = it8771; @@ -2837,6 +2833,7 @@ static int __init it87_find(int sioaddr, unsigned short *address, break; case IT8790E_DEVID: sio_data->type = it8790; + doexit = false; /* See IT8792E comment above */ break; case IT8603E_DEVID: case IT8623E_DEVID: @@ -3012,9 +3009,16 @@ static int __init it87_find(int sioaddr, unsigned short *address, if (reg29 & BIT(2)) sio_data->skip_fan |= BIT(1); - if (sio_data->type == it8603) { + switch (sio_data->type) { + case it8603: sio_data->skip_in |= BIT(5); /* No VIN5 */ sio_data->skip_in |= BIT(6); /* No VIN6 */ + break; + case it8607: + sio_data->skip_pwm |= BIT(0);/* No fan1 */ + sio_data->skip_fan |= BIT(0); + default: + break; } sio_data->beep_pin = superio_inb(sioaddr, @@ -3360,7 +3364,7 @@ static int __init it87_find(int sioaddr, unsigned short *address, pr_info("Beeping is supported\n"); exit: - superio_exit(sioaddr); + superio_exit(sioaddr, doexit); return err; } @@ -3370,6 +3374,7 @@ static void it87_init_regs(struct platform_device *pdev) /* Initialize chip specific register pointers */ switch (data->type) { + case it8628: case it8686: data->REG_FAN = IT87_REG_FAN; data->REG_FANX = IT87_REG_FANX; @@ -3638,6 +3643,7 @@ static int it87_probe(struct platform_device *pdev) data->type = sio_data->type; data->features = it87_devices[sio_data->type].features; data->num_temp_limit = it87_devices[sio_data->type].num_temp_limit; + data->num_temp_offset = it87_devices[sio_data->type].num_temp_offset; data->peci_mask = it87_devices[sio_data->type].peci_mask; data->old_peci_mask = it87_devices[sio_data->type].old_peci_mask; data->bank = 0xff; @@ -3816,19 +3822,26 @@ exit_device_put: } struct it87_dmi_data { - bool sio4e_broken; /* SIO accesses @ 0x4e are broken */ - char *sio_mutex; /* SIO ACPI mutex */ + bool sio2_force_config; /* force sio2 into configuration mode */ u8 skip_pwm; /* pwm channels to skip for this board */ }; /* - * On Gigabyte AB350 and AX370 boards, accesses to the Super-IO chip - * at address 0x4e/0x4f can result in a system hang. - * Accesses to address 0x2e/0x2f need to be mutex protected. + * On various Gigabyte AM4 boards (AB350, AX370), the second Super-IO chip + * (IT8792E) needs to be in configuration mode before accessing the first + * due to a bug in IT8792E which otherwise results in LPC bus access errors. + * This needs to be done before accessing the first Super-IO chip since + * the second chip may have been accessed prior to loading this driver. + * + * The problem is also reported to affect IT8795E, which is used on X299 boards + * and has the same chip ID as IT9792E (0x8733). It also appears to affect + * systems with IT8790E, which is used on some Z97X-Gaming boards as well as + * Z87X-OC. + * DMI entries for those systems will be added as they become available and + * as the problem is confirmed to affect those boards. */ -static struct it87_dmi_data gigabyte_ab350_gaming = { - .sio4e_broken = true, - .sio_mutex = "\\_SB.PCI0.SBRG.SIO1.MUT0", +static struct it87_dmi_data gigabyte_sio2_force = { + .sio2_force_config = true, }; /* @@ -3847,37 +3860,23 @@ static const struct dmi_system_id it87_dmi_table[] __initconst = { { .matches = { DMI_MATCH(DMI_SYS_VENDOR, "Gigabyte Technology Co., Ltd."), - DMI_MATCH(DMI_BOARD_NAME, "AB350-Gaming-CF"), - }, - .driver_data = &gigabyte_ab350_gaming, - }, - { - .matches = { - DMI_MATCH(DMI_SYS_VENDOR, "Gigabyte Technology Co., Ltd."), - DMI_MATCH(DMI_BOARD_NAME, "AB350-Gaming 3-CF"), - }, - .driver_data = &gigabyte_ab350_gaming, - }, - { - .matches = { - DMI_MATCH(DMI_SYS_VENDOR, "Gigabyte Technology Co., Ltd."), - DMI_MATCH(DMI_BOARD_NAME, "AB350M-D3H-CF"), + DMI_MATCH(DMI_BOARD_NAME, "AB350"), }, - .driver_data = &gigabyte_ab350_gaming, + .driver_data = &gigabyte_sio2_force, }, { .matches = { DMI_MATCH(DMI_SYS_VENDOR, "Gigabyte Technology Co., Ltd."), - DMI_MATCH(DMI_BOARD_NAME, "AX370-Gaming K7"), + DMI_MATCH(DMI_BOARD_NAME, "AX370"), }, - .driver_data = &gigabyte_ab350_gaming, + .driver_data = &gigabyte_sio2_force, }, { .matches = { DMI_MATCH(DMI_SYS_VENDOR, "Gigabyte Technology Co., Ltd."), - DMI_MATCH(DMI_BOARD_NAME, "AX370-Gaming 5"), + DMI_MATCH(DMI_BOARD_NAME, "Z97X-Gaming G1"), }, - .driver_data = &gigabyte_ab350_gaming, + .driver_data = &gigabyte_sio2_force, }, { .matches = { @@ -3902,37 +3901,14 @@ static int __init sm_it87_init(void) if (dmi) dmi_data = dmi->driver_data; - if (dmi_data) { - it87_sio4e_broken = dmi_data->sio4e_broken; -#ifdef __IT87_USE_ACPI_MUTEX - if (dmi_data->sio_mutex) { - static acpi_status status; - - status = acpi_get_handle(NULL, dmi_data->sio_mutex, - &it87_acpi_sio_handle); - if (ACPI_SUCCESS(status)) { - it87_acpi_sio_mutex = dmi_data->sio_mutex; - pr_debug("Found ACPI SIO mutex %s\n", - dmi_data->sio_mutex); - } else { - pr_warn("ACPI SIO mutex %s not found\n", - dmi_data->sio_mutex); - } - } -#endif /* __IT87_USE_ACPI_MUTEX */ - } - err = platform_driver_register(&it87_driver); if (err) return err; + if (dmi_data && dmi_data->sio2_force_config) + __superio_enter(REG_4E); + for (i = 0; i < ARRAY_SIZE(sioaddr); i++) { - /* - * Accessing the second Super-IO chip can result in board - * hangs. Disable until we figure out what is going on. - */ - if (blacklist && it87_sio4e_broken && sioaddr[i] == 0x4e) - continue; memset(&sio_data, 0, sizeof(struct it87_sio_data)); isa_address = 0; err = it87_find(sioaddr[i], &isa_address, &sio_data);