X-Git-Url: https://git.sur5r.net/?a=blobdiff_plain;f=it87.c;h=eae64f38ee1fe8d5927e8fba85efd2a1f7017230;hb=aeafb7be7c845d3a60691a32c6e1d86eca623691;hp=8fb14b9d523998b743831ca09c560af85f0a1d74;hpb=beecac84d9e6d3f2da3f5d63d70233ba2b18bf2b;p=groeck-it87 diff --git a/it87.c b/it87.c index 8fb14b9..eae64f3 100644 --- a/it87.c +++ b/it87.c @@ -77,9 +77,6 @@ #define DRVNAME "it87" -/* Necessary API not (yet) exported in upstream kernel */ -/* #define __IT87_USE_ACPI_MUTEX */ - enum chips { it87, it8712, it8716, it8718, it8720, it8721, it8728, it8732, it8771, it8772, it8781, it8782, it8783, it8786, it8790, it8792, it8603, it8607, it8613, it8620, it8622, it8625, it8628, @@ -89,17 +86,7 @@ static unsigned short force_id; module_param(force_id, ushort, 0); MODULE_PARM_DESC(force_id, "Override the detected device ID"); -static unsigned short blacklist = 1; -module_param(blacklist, ushort, 0); -MODULE_PARM_DESC(blacklist, - "Enable/disable blacklist (1=enable, 0=disable, default 1)"); - static struct platform_device *it87_pdev[2]; -static bool it87_sio4e_broken; -#ifdef __IT87_USE_ACPI_MUTEX -static acpi_handle it87_acpi_sio_handle; -static char *it87_acpi_sio_mutex; -#endif #define REG_2E 0x2e /* The register to read/write */ #define REG_4E 0x4e /* Secondary register to read/write */ @@ -127,12 +114,6 @@ static inline int superio_inb(int ioreg, int reg) outb(reg, ioreg); val = inb(ioreg + 1); - if (it87_sio4e_broken && ioreg == 0x4e && val == 0xff) { - __superio_enter(ioreg); - outb(reg, ioreg); - val = inb(ioreg + 1); - pr_warn("Retry access 0x4e:0x%x -> 0x%x\n", reg, val); - } return val; } @@ -156,17 +137,6 @@ static inline void superio_select(int ioreg, int ldn) static inline int superio_enter(int ioreg) { -#ifdef __IT87_USE_ACPI_MUTEX - if (it87_acpi_sio_mutex) { - acpi_status status; - - status = acpi_acquire_mutex(NULL, it87_acpi_sio_mutex, 0x10); - if (ACPI_FAILURE(status)) { - pr_err("Failed to acquire ACPI mutex\n"); - return -EBUSY; - } - } -#endif /* * Try to reserve ioreg and ioreg + 1 for exclusive access. */ @@ -177,24 +147,16 @@ static inline int superio_enter(int ioreg) return 0; error: -#ifdef __IT87_USE_ACPI_MUTEX - if (it87_acpi_sio_mutex) - acpi_release_mutex(it87_acpi_sio_handle, NULL); -#endif return -EBUSY; } -static inline void superio_exit(int ioreg) +static inline void superio_exit(int ioreg, bool doexit) { - if (!it87_sio4e_broken || ioreg != 0x4e) { + if (doexit) { outb(0x02, ioreg); outb(0x02, ioreg + 1); } release_region(ioreg, 2); -#ifdef __IT87_USE_ACPI_MUTEX - if (it87_acpi_sio_mutex) - acpi_release_mutex(it87_acpi_sio_handle, NULL); -#endif } /* Logical device 4 registers */ @@ -365,6 +327,7 @@ struct it87_devices { u32 features; u8 num_temp_limit; u8 num_temp_offset; + u8 num_temp_map; /* Number of temperature sources for pwm */ u8 peci_mask; u8 old_peci_mask; }; @@ -403,6 +366,7 @@ static const struct it87_devices it87_devices[] = { /* may need to overwrite */ .num_temp_limit = 3, .num_temp_offset = 0, + .num_temp_map = 3, }, [it8712] = { .name = "it8712", @@ -411,6 +375,7 @@ static const struct it87_devices it87_devices[] = { /* may need to overwrite */ .num_temp_limit = 3, .num_temp_offset = 0, + .num_temp_map = 3, }, [it8716] = { .name = "it8716", @@ -420,6 +385,7 @@ static const struct it87_devices it87_devices[] = { | FEAT_FANCTL_ONOFF, .num_temp_limit = 3, .num_temp_offset = 3, + .num_temp_map = 3, }, [it8718] = { .name = "it8718", @@ -429,6 +395,7 @@ static const struct it87_devices it87_devices[] = { | FEAT_PWM_FREQ2 | FEAT_FANCTL_ONOFF, .num_temp_limit = 3, .num_temp_offset = 3, + .num_temp_map = 3, .old_peci_mask = 0x4, }, [it8720] = { @@ -439,6 +406,7 @@ static const struct it87_devices it87_devices[] = { | FEAT_PWM_FREQ2 | FEAT_FANCTL_ONOFF, .num_temp_limit = 3, .num_temp_offset = 3, + .num_temp_map = 3, .old_peci_mask = 0x4, }, [it8721] = { @@ -450,6 +418,7 @@ static const struct it87_devices it87_devices[] = { | FEAT_PWM_FREQ2 | FEAT_SCALING | FEAT_FANCTL_ONOFF, .num_temp_limit = 3, .num_temp_offset = 3, + .num_temp_map = 3, .peci_mask = 0x05, .old_peci_mask = 0x02, /* Actually reports PCH */ }, @@ -462,6 +431,7 @@ static const struct it87_devices it87_devices[] = { | FEAT_FANCTL_ONOFF, .num_temp_limit = 6, .num_temp_offset = 3, + .num_temp_map = 3, .peci_mask = 0x07, }, [it8732] = { @@ -473,6 +443,7 @@ static const struct it87_devices it87_devices[] = { | FEAT_FOUR_PWM | FEAT_FANCTL_ONOFF, .num_temp_limit = 3, .num_temp_offset = 3, + .num_temp_map = 3, .peci_mask = 0x07, .old_peci_mask = 0x02, /* Actually reports PCH */ }, @@ -488,6 +459,7 @@ static const struct it87_devices it87_devices[] = { /* three fans, always 16 bit (guesswork) */ .num_temp_limit = 3, .num_temp_offset = 3, + .num_temp_map = 3, .peci_mask = 0x07, }, [it8772] = { @@ -502,6 +474,7 @@ static const struct it87_devices it87_devices[] = { /* three fans, always 16 bit (datasheet) */ .num_temp_limit = 3, .num_temp_offset = 3, + .num_temp_map = 3, .peci_mask = 0x07, }, [it8781] = { @@ -512,6 +485,7 @@ static const struct it87_devices it87_devices[] = { | FEAT_FANCTL_ONOFF, .num_temp_limit = 3, .num_temp_offset = 3, + .num_temp_map = 3, .old_peci_mask = 0x4, }, [it8782] = { @@ -522,6 +496,7 @@ static const struct it87_devices it87_devices[] = { | FEAT_FANCTL_ONOFF, .num_temp_limit = 3, .num_temp_offset = 3, + .num_temp_map = 3, .old_peci_mask = 0x4, }, [it8783] = { @@ -532,6 +507,7 @@ static const struct it87_devices it87_devices[] = { | FEAT_FANCTL_ONOFF, .num_temp_limit = 3, .num_temp_offset = 3, + .num_temp_map = 3, .old_peci_mask = 0x4, }, [it8786] = { @@ -542,6 +518,7 @@ static const struct it87_devices it87_devices[] = { | FEAT_PWM_FREQ2 | FEAT_FANCTL_ONOFF, .num_temp_limit = 3, .num_temp_offset = 3, + .num_temp_map = 3, .peci_mask = 0x07, }, [it8790] = { @@ -552,6 +529,7 @@ static const struct it87_devices it87_devices[] = { | FEAT_IN7_INTERNAL | FEAT_PWM_FREQ2 | FEAT_FANCTL_ONOFF, .num_temp_limit = 3, .num_temp_offset = 3, + .num_temp_map = 3, .peci_mask = 0x07, }, [it8792] = { @@ -562,6 +540,7 @@ static const struct it87_devices it87_devices[] = { | FEAT_IN7_INTERNAL | FEAT_PWM_FREQ2 | FEAT_FANCTL_ONOFF, .num_temp_limit = 3, .num_temp_offset = 3, + .num_temp_map = 3, .peci_mask = 0x07, }, [it8603] = { @@ -572,17 +551,19 @@ static const struct it87_devices it87_devices[] = { | FEAT_AVCC3 | FEAT_PWM_FREQ2 | FEAT_SCALING, .num_temp_limit = 3, .num_temp_offset = 3, + .num_temp_map = 4, .peci_mask = 0x07, }, [it8607] = { .name = "it8607", .suffix = "E", .features = FEAT_NEWER_AUTOPWM | FEAT_12MV_ADC | FEAT_16BIT_FANS - | FEAT_TEMP_PECI | FEAT_IN7_INTERNAL + | FEAT_TEMP_PECI | FEAT_IN7_INTERNAL | FEAT_NEW_TEMPMAP | FEAT_AVCC3 | FEAT_PWM_FREQ2 | FEAT_SCALING | FEAT_FANCTL_ONOFF, .num_temp_limit = 3, .num_temp_offset = 3, + .num_temp_map = 6, .peci_mask = 0x07, }, [it8613] = { @@ -594,6 +575,7 @@ static const struct it87_devices it87_devices[] = { | FEAT_AVCC3 | FEAT_SCALING | FEAT_NEW_TEMPMAP, .num_temp_limit = 6, .num_temp_offset = 6, + .num_temp_map = 6, .peci_mask = 0x07, }, [it8620] = { @@ -606,6 +588,7 @@ static const struct it87_devices it87_devices[] = { | FEAT_FANCTL_ONOFF, .num_temp_limit = 3, .num_temp_offset = 3, + .num_temp_map = 3, .peci_mask = 0x07, }, [it8622] = { @@ -617,6 +600,7 @@ static const struct it87_devices it87_devices[] = { | FEAT_AVCC3 | FEAT_VIN3_5V | FEAT_SCALING, .num_temp_limit = 3, .num_temp_offset = 3, + .num_temp_map = 4, .peci_mask = 0x07, }, [it8625] = { @@ -628,6 +612,7 @@ static const struct it87_devices it87_devices[] = { | FEAT_SIX_PWM | FEAT_BANK_SEL | FEAT_SCALING, .num_temp_limit = 6, .num_temp_offset = 6, + .num_temp_map = 6, }, [it8628] = { .name = "it8628", @@ -639,26 +624,29 @@ static const struct it87_devices it87_devices[] = { | FEAT_FANCTL_ONOFF, .num_temp_limit = 6, .num_temp_offset = 3, + .num_temp_map = 3, .peci_mask = 0x07, }, [it8655] = { .name = "it8655", .suffix = "E", .features = FEAT_NEWER_AUTOPWM | FEAT_16BIT_FANS - | FEAT_AVCC3 | FEAT_NEW_TEMPMAP + | FEAT_AVCC3 | FEAT_NEW_TEMPMAP | FEAT_SCALING | FEAT_10_9MV_ADC | FEAT_IN7_INTERNAL | FEAT_BANK_SEL, .num_temp_limit = 6, .num_temp_offset = 6, + .num_temp_map = 6, }, [it8665] = { .name = "it8665", .suffix = "E", .features = FEAT_NEWER_AUTOPWM | FEAT_16BIT_FANS - | FEAT_AVCC3 | FEAT_NEW_TEMPMAP + | FEAT_AVCC3 | FEAT_NEW_TEMPMAP | FEAT_SCALING | FEAT_10_9MV_ADC | FEAT_IN7_INTERNAL | FEAT_SIX_FANS | FEAT_SIX_PWM | FEAT_BANK_SEL, .num_temp_limit = 6, .num_temp_offset = 6, + .num_temp_map = 6, }, [it8686] = { .name = "it8686", @@ -669,6 +657,7 @@ static const struct it87_devices it87_devices[] = { | FEAT_SIX_TEMP | FEAT_BANK_SEL | FEAT_SCALING | FEAT_AVCC3, .num_temp_limit = 6, .num_temp_offset = 6, + .num_temp_map = 7, }, }; @@ -787,6 +776,9 @@ struct it87_data { u8 pwm_ctrl[NUM_PWM]; /* Register value */ u8 pwm_duty[NUM_PWM]; /* Manual PWM value set by user */ u8 pwm_temp_map[NUM_PWM];/* PWM to temp. chan. mapping (bits 1-0) */ + u8 pwm_temp_map_mask; /* 0x03 for old, 0x07 for new temp map */ + u8 pwm_temp_map_shift; /* 0 for old, 3 for new temp map */ + u8 pwm_num_temp_map; /* from config data, 3..7 depending on chip */ /* Automatic fan speed control registers */ u8 auto_pwm[NUM_AUTO_PWM][4]; /* [nr][3] is hard-coded */ @@ -873,6 +865,25 @@ static int DIV_TO_REG(int val) #define DIV_FROM_REG(val) BIT(val) +static u8 temp_map_from_reg(const struct it87_data *data, u8 reg) +{ + u8 map; + + map = (reg >> data->pwm_temp_map_shift) & data->pwm_temp_map_mask; + if (map >= data->pwm_num_temp_map) /* map is 0-based */ + map = 0; + + return map; +} + +static u8 temp_map_to_reg(const struct it87_data *data, int nr, u8 map) +{ + u8 ctrl = data->pwm_ctrl[nr]; + + return (ctrl & ~(data->pwm_temp_map_mask << data->pwm_temp_map_shift)) | + (map << data->pwm_temp_map_shift); +} + /* * PWM base frequencies. The frequency has to be divided by either 128 or 256, * depending on the chip type, to calculate the actual PWM frequency. @@ -942,19 +953,19 @@ static void it87_write_value(struct it87_data *data, u16 reg, u8 value) static void it87_update_pwm_ctrl(struct it87_data *data, int nr) { - data->pwm_ctrl[nr] = it87_read_value(data, data->REG_PWM[nr]); + u8 ctrl; + + ctrl = it87_read_value(data, data->REG_PWM[nr]); + data->pwm_ctrl[nr] = ctrl; if (has_newer_autopwm(data)) { - if (has_new_tempmap(data)) - data->pwm_temp_map[nr] = data->pwm_ctrl[nr] & 0x38; - else - data->pwm_temp_map[nr] = data->pwm_ctrl[nr] & 0x03; + data->pwm_temp_map[nr] = temp_map_from_reg(data, ctrl); data->pwm_duty[nr] = it87_read_value(data, IT87_REG_PWM_DUTY[nr]); } else { - if (data->pwm_ctrl[nr] & 0x80) /* Automatic mode */ - data->pwm_temp_map[nr] = data->pwm_ctrl[nr] & 0x03; + if (ctrl & 0x80) /* Automatic mode */ + data->pwm_temp_map[nr] = temp_map_from_reg(data, ctrl); else /* Manual mode */ - data->pwm_duty[nr] = data->pwm_ctrl[nr] & 0x7f; + data->pwm_duty[nr] = ctrl & 0x7f; } if (has_old_autopwm(data)) { @@ -1661,6 +1672,7 @@ static ssize_t set_pwm_enable(struct device *dev, struct device_attribute *attr, } mutex_lock(&data->update_lock); + it87_update_pwm_ctrl(data, nr); if (val == 0) { if (nr < 3 && has_fanctl_onoff(data)) { @@ -1681,8 +1693,8 @@ static ssize_t set_pwm_enable(struct device *dev, struct device_attribute *attr, data->pwm_duty[nr]); /* and set manual mode */ if (has_newer_autopwm(data)) { - ctrl = (data->pwm_ctrl[nr] & 0x7c) | - data->pwm_temp_map[nr]; + ctrl = temp_map_to_reg(data, nr, + data->pwm_temp_map[nr]); } else { ctrl = data->pwm_duty[nr]; } @@ -1693,8 +1705,8 @@ static ssize_t set_pwm_enable(struct device *dev, struct device_attribute *attr, u8 ctrl; if (has_newer_autopwm(data)) { - ctrl = (data->pwm_ctrl[nr] & 0x7c) | - data->pwm_temp_map[nr]; + ctrl = temp_map_to_reg(data, nr, + data->pwm_temp_map[nr]); if (val != 1) ctrl |= 0x80; } else { @@ -1798,21 +1810,8 @@ static ssize_t show_pwm_temp_map(struct device *dev, struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr); struct it87_data *data = it87_update_device(dev); int nr = sensor_attr->index; - int map; - map = data->pwm_temp_map[nr]; - if (has_new_tempmap(data)) { - map >>= 3; - if (map >= 6) - map = 0; /* Should never happen */ - } else { - if (map >= 3) - map = 0; /* Should never happen */ - if (nr >= 3) /* pwm channels 3..6 map to temp4..6 */ - map += 3; - } - - return sprintf(buf, "%d\n", (int)BIT(map)); + return sprintf(buf, "%d\n", data->pwm_temp_map[nr] + 1); } static ssize_t set_pwm_temp_map(struct device *dev, @@ -1822,58 +1821,26 @@ static ssize_t set_pwm_temp_map(struct device *dev, struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr); struct it87_data *data = dev_get_drvdata(dev); int nr = sensor_attr->index; - long val; - u8 reg; + unsigned long val; + u8 map; - if (kstrtol(buf, 10, &val) < 0) + if (kstrtoul(buf, 10, &val) < 0) return -EINVAL; - if (nr >= 3 && !has_new_tempmap(data)) - val -= 3; - - switch (val) { - case BIT(0): - reg = 0x00; - break; - case BIT(1): - reg = 0x01; - break; - case BIT(2): - reg = 0x02; - break; - case BIT(3): - reg = 0x03; - break; - case BIT(4): - reg = 0x04; - break; - case BIT(5): - reg = 0x05; - break; - case BIT(6): - reg = 0x06; - break; - default: + if (!val || val > data->pwm_num_temp_map) return -EINVAL; - } - if (has_new_tempmap(data)) - reg <<= 3; - else if (reg > 0x02) - return -EINVAL; + map = val - 1; mutex_lock(&data->update_lock); it87_update_pwm_ctrl(data, nr); - data->pwm_temp_map[nr] = reg; + data->pwm_temp_map[nr] = map; /* * If we are in automatic mode, write the temp mapping immediately; * otherwise, just store it for later use. */ if (data->pwm_ctrl[nr] & 0x80) { - u8 mask = has_new_tempmap(data) ? 0xc7 : 0xfc; - - data->pwm_ctrl[nr] = (data->pwm_ctrl[nr] & mask) | - data->pwm_temp_map[nr]; + data->pwm_ctrl[nr] = temp_map_to_reg(data, nr, map); it87_write_value(data, data->REG_PWM[nr], data->pwm_ctrl[nr]); } mutex_unlock(&data->update_lock); @@ -2798,9 +2765,10 @@ static const struct attribute_group it87_group_auto_pwm = { static int __init it87_find(int sioaddr, unsigned short *address, struct it87_sio_data *sio_data) { - int err; - u16 chip_type; const struct it87_devices *config; + bool doexit = true; + u16 chip_type; + int err; err = superio_enter(sioaddr); if (err) @@ -2842,6 +2810,13 @@ static int __init it87_find(int sioaddr, unsigned short *address, break; case IT8792E_DEVID: sio_data->type = it8792; + /* + * Disabling configuration mode on IT8792E can result in system + * hang-ups and access failures to the Super-IO chip at the + * second SIO address. Never exit configuration mode on this + * chip to avoid the problem. + */ + doexit = false; break; case IT8771E_DEVID: sio_data->type = it8771; @@ -2863,6 +2838,7 @@ static int __init it87_find(int sioaddr, unsigned short *address, break; case IT8790E_DEVID: sio_data->type = it8790; + doexit = false; /* See IT8792E comment above */ break; case IT8603E_DEVID: case IT8623E_DEVID: @@ -3393,7 +3369,7 @@ static int __init it87_find(int sioaddr, unsigned short *address, pr_info("Beeping is supported\n"); exit: - superio_exit(sioaddr); + superio_exit(sioaddr, doexit); return err; } @@ -3467,13 +3443,21 @@ static void it87_init_device(struct platform_device *pdev) int tmp, i; u8 mask; + if (has_new_tempmap(data)) { + data->pwm_temp_map_shift = 3; + data->pwm_temp_map_mask = 0x07; + } else { + data->pwm_temp_map_shift = 0; + data->pwm_temp_map_mask = 0x03; + } + /* * For each PWM channel: * - If it is in automatic mode, setting to manual mode should set * the fan to full speed by default. * - If it is in manual mode, we need a mapping to temperature * channels to use when later setting to automatic mode later. - * Use a 1:1 mapping by default (we are clueless.) + * Map to the first sensor by default (we are clueless.) * In both cases, the value can (and should) be changed by the user * prior to switching to a different mode. * Note that this is no longer needed for the IT8721F and later, as @@ -3481,7 +3465,7 @@ static void it87_init_device(struct platform_device *pdev) * manual duty cycle. */ for (i = 0; i < NUM_AUTO_PWM; i++) { - data->pwm_temp_map[i] = i; + data->pwm_temp_map[i] = 0; data->pwm_duty[i] = 0x7f; /* Full speed */ data->auto_pwm[i][3] = 0x7f; /* Full speed, hard-coded */ } @@ -3673,6 +3657,7 @@ static int it87_probe(struct platform_device *pdev) data->features = it87_devices[sio_data->type].features; data->num_temp_limit = it87_devices[sio_data->type].num_temp_limit; data->num_temp_offset = it87_devices[sio_data->type].num_temp_offset; + data->pwm_num_temp_map = it87_devices[sio_data->type].num_temp_map; data->peci_mask = it87_devices[sio_data->type].peci_mask; data->old_peci_mask = it87_devices[sio_data->type].old_peci_mask; data->bank = 0xff; @@ -3851,19 +3836,26 @@ exit_device_put: } struct it87_dmi_data { - bool sio4e_broken; /* SIO accesses @ 0x4e are broken */ - char *sio_mutex; /* SIO ACPI mutex */ + bool sio2_force_config; /* force sio2 into configuration mode */ u8 skip_pwm; /* pwm channels to skip for this board */ }; /* - * On Gigabyte AB350 and AX370 boards, accesses to the Super-IO chip - * at address 0x4e/0x4f can result in a system hang. - * Accesses to address 0x2e/0x2f need to be mutex protected. + * On various Gigabyte AM4 boards (AB350, AX370), the second Super-IO chip + * (IT8792E) needs to be in configuration mode before accessing the first + * due to a bug in IT8792E which otherwise results in LPC bus access errors. + * This needs to be done before accessing the first Super-IO chip since + * the second chip may have been accessed prior to loading this driver. + * + * The problem is also reported to affect IT8795E, which is used on X299 boards + * and has the same chip ID as IT9792E (0x8733). It also appears to affect + * systems with IT8790E, which is used on some Z97X-Gaming boards as well as + * Z87X-OC. + * DMI entries for those systems will be added as they become available and + * as the problem is confirmed to affect those boards. */ -static struct it87_dmi_data gigabyte_ab350_gaming = { - .sio4e_broken = true, - .sio_mutex = "\\_SB.PCI0.SBRG.SIO1.MUT0", +static struct it87_dmi_data gigabyte_sio2_force = { + .sio2_force_config = true, }; /* @@ -3882,37 +3874,23 @@ static const struct dmi_system_id it87_dmi_table[] __initconst = { { .matches = { DMI_MATCH(DMI_SYS_VENDOR, "Gigabyte Technology Co., Ltd."), - DMI_MATCH(DMI_BOARD_NAME, "AB350-Gaming-CF"), - }, - .driver_data = &gigabyte_ab350_gaming, - }, - { - .matches = { - DMI_MATCH(DMI_SYS_VENDOR, "Gigabyte Technology Co., Ltd."), - DMI_MATCH(DMI_BOARD_NAME, "AB350-Gaming 3-CF"), - }, - .driver_data = &gigabyte_ab350_gaming, - }, - { - .matches = { - DMI_MATCH(DMI_SYS_VENDOR, "Gigabyte Technology Co., Ltd."), - DMI_MATCH(DMI_BOARD_NAME, "AB350M-D3H-CF"), + DMI_MATCH(DMI_BOARD_NAME, "AB350"), }, - .driver_data = &gigabyte_ab350_gaming, + .driver_data = &gigabyte_sio2_force, }, { .matches = { DMI_MATCH(DMI_SYS_VENDOR, "Gigabyte Technology Co., Ltd."), - DMI_MATCH(DMI_BOARD_NAME, "AX370-Gaming K7"), + DMI_MATCH(DMI_BOARD_NAME, "AX370"), }, - .driver_data = &gigabyte_ab350_gaming, + .driver_data = &gigabyte_sio2_force, }, { .matches = { DMI_MATCH(DMI_SYS_VENDOR, "Gigabyte Technology Co., Ltd."), - DMI_MATCH(DMI_BOARD_NAME, "AX370-Gaming 5"), + DMI_MATCH(DMI_BOARD_NAME, "Z97X-Gaming G1"), }, - .driver_data = &gigabyte_ab350_gaming, + .driver_data = &gigabyte_sio2_force, }, { .matches = { @@ -3937,37 +3915,14 @@ static int __init sm_it87_init(void) if (dmi) dmi_data = dmi->driver_data; - if (dmi_data) { - it87_sio4e_broken = dmi_data->sio4e_broken; -#ifdef __IT87_USE_ACPI_MUTEX - if (dmi_data->sio_mutex) { - static acpi_status status; - - status = acpi_get_handle(NULL, dmi_data->sio_mutex, - &it87_acpi_sio_handle); - if (ACPI_SUCCESS(status)) { - it87_acpi_sio_mutex = dmi_data->sio_mutex; - pr_debug("Found ACPI SIO mutex %s\n", - dmi_data->sio_mutex); - } else { - pr_warn("ACPI SIO mutex %s not found\n", - dmi_data->sio_mutex); - } - } -#endif /* __IT87_USE_ACPI_MUTEX */ - } - err = platform_driver_register(&it87_driver); if (err) return err; + if (dmi_data && dmi_data->sio2_force_config) + __superio_enter(REG_4E); + for (i = 0; i < ARRAY_SIZE(sioaddr); i++) { - /* - * Accessing the second Super-IO chip can result in board - * hangs. Disable until we figure out what is going on. - */ - if (blacklist && it87_sio4e_broken && sioaddr[i] == 0x4e) - continue; memset(&sio_data, 0, sizeof(struct it87_sio_data)); isa_address = 0; err = it87_find(sioaddr[i], &isa_address, &sio_data);