X-Git-Url: https://git.sur5r.net/?a=blobdiff_plain;f=lib_i386%2Fbios_setup.c;h=6491e522ec4ef18513e1763f0434a80429175d05;hb=f7767c7541a8cdae55655d10f039a5bc62894ee8;hp=75f04a01fe637cc3aac4e79b203802c28a30fd91;hpb=534ff676a9c2ffd460e096754894e78551e4ed1e;p=u-boot

diff --git a/lib_i386/bios_setup.c b/lib_i386/bios_setup.c
index 75f04a01fe..6491e522ec 100644
--- a/lib_i386/bios_setup.c
+++ b/lib_i386/bios_setup.c
@@ -45,6 +45,9 @@ DECLARE_GLOBAL_DATA_PTR;
 #define BIOS_BASE        ((char*)0xf0000)
 #define BIOS_CS          0xf000
 
+extern ulong _i386boot_bios;
+extern ulong _i386boot_bios_size;
+
 /* these are defined in a 16bit segment and needs
  * to be accessed with the RELOC_16_xxxx() macros below
  */
@@ -138,10 +141,14 @@ static void setvector(int vector, u16 segment, void *handler)
 
 int bios_setup(void)
 {
+	ulong i386boot_bios      = (ulong)&_i386boot_bios;
+	ulong i386boot_bios_size = (ulong)&_i386boot_bios_size;
+
 	static int done=0;
 	int vector;
+#ifdef CONFIG_PCI
 	struct pci_controller *pri_hose;
-
+#endif
 	if (done) {
 		return 0;
 	}
@@ -223,12 +230,13 @@ int bios_setup(void)
 	 * (This, ofcause break on multi hose systems,
 	 *  but our PCI BIOS only support one hose anyway)
 	 */
+#ifdef CONFIG_PCI
 	pri_hose = pci_bus_to_hose(0);
 	if (NULL != pri_hose) {
 		/* fill in last pci bus number for use by the realmode
 		 * PCI BIOS */
 		RELOC_16_BYTE(0xf000, pci_last_bus) = pri_hose->last_busno;
 	}
-
+#endif
 	return 0;
 }