X-Git-Url: https://git.sur5r.net/?a=blobdiff_plain;f=lib_ppc%2Fcache.c;h=5bfb22070727e6d1103398990374d002d42a2e6c;hb=192f90e272b3989ee7b4a666d1fdab831f20f8d2;hp=bec092e4cebc64ff6d90ae6bbe2df3f8c044dee1;hpb=affae2bff825c1a8d2cfeaf7b270188d251d39d2;p=u-boot

diff --git a/lib_ppc/cache.c b/lib_ppc/cache.c
index bec092e4ce..5bfb220707 100644
--- a/lib_ppc/cache.c
+++ b/lib_ppc/cache.c
@@ -22,9 +22,12 @@
  */
 
 #include <common.h>
+#include <asm/cache.h>
+#include <watchdog.h>
 
 void flush_cache (ulong start_addr, ulong size)
 {
+#ifndef CONFIG_5xx
 	ulong addr, end_addr = start_addr + size;
 
 	if (CFG_CACHELINE_SIZE) {
@@ -33,6 +36,7 @@ void flush_cache (ulong start_addr, ulong size)
 		     addr < end_addr;
 		     addr += CFG_CACHELINE_SIZE) {
 			asm ("dcbst 0,%0": :"r" (addr));
+			WATCHDOG_RESET();
 		}
 		asm ("sync");	/* Wait for all dcbst to complete on bus */
 
@@ -40,8 +44,10 @@ void flush_cache (ulong start_addr, ulong size)
 		     addr < end_addr;
 		     addr += CFG_CACHELINE_SIZE) {
 			asm ("icbi 0,%0": :"r" (addr));
+			WATCHDOG_RESET();
 		}
 	}
 	asm ("sync");		/* Always flush prefetch queue in any case */
 	asm ("isync");
+#endif
 }