X-Git-Url: https://git.sur5r.net/?a=blobdiff_plain;f=post%2Fcpu%2Fppc4xx%2Fdenali_ecc.c;h=6d146355956252c9aa3ef1a1fd79d8b4262f7f5f;hb=79f49120ba481ed736face73ecf11a6c1070a861;hp=50ae7fb8f0decd9e5c974495cde72c2a5d0d6245;hpb=2e6e1772c0e34871769be4aef79748fe3e47d953;p=u-boot

diff --git a/post/cpu/ppc4xx/denali_ecc.c b/post/cpu/ppc4xx/denali_ecc.c
index 50ae7fb8f0..6d14635595 100644
--- a/post/cpu/ppc4xx/denali_ecc.c
+++ b/post/cpu/ppc4xx/denali_ecc.c
@@ -174,6 +174,7 @@ static int test_ecc(uint32_t ecc_addr)
 	clear_and_enable_ecc();
 	out_be32(ecc_mem, ECC_PATTERN);
 	out_be32(ecc_mem + 1, ECC_PATTERN);
+	ppcDcbf((u32)ecc_mem);
 
 	/* Verify no ECC error reading back */
 	value = in_be32(ecc_mem);
@@ -193,6 +194,7 @@ static int test_ecc(uint32_t ecc_addr)
 
 	/* Test for correctable error by creating a one-bit error */
 	out_be32(ecc_mem, ECC_PATTERN_CORR);
+	ppcDcbf((u32)ecc_mem);
 	clear_and_enable_ecc();
 	value = in_be32(ecc_mem);
 	disable_ecc();
@@ -212,6 +214,7 @@ static int test_ecc(uint32_t ecc_addr)
 
 	/* Test for uncorrectable error by creating a two-bit error */
 	out_be32(ecc_mem, ECC_PATTERN_UNCORR);
+	ppcDcbf((u32)ecc_mem);
 	clear_and_enable_ecc();
 	value = in_be32(ecc_mem);
 	disable_ecc();
@@ -232,6 +235,7 @@ static int test_ecc(uint32_t ecc_addr)
 
 	/* Remove error from SDRAM and enable ECC. */
 	out_be32(ecc_mem, ECC_PATTERN);
+	ppcDcbf((u32)ecc_mem);
 	clear_and_enable_ecc();
 
 	return ret;