X-Git-Url: https://git.sur5r.net/?a=blobdiff_plain;f=post%2Flib_ppc%2Fandi.c;h=52ec7c4d4e919c384bd3b62e3a9636d3399d34e2;hb=e4430779623af500de1cee7892c379f07ef59813;hp=e3315bf15e4665fea22dbfe6cbd471be6d471817;hpb=4b7a6dd89633d60dc4b58476d5ce48247f82a3ca;p=u-boot

diff --git a/post/lib_ppc/andi.c b/post/lib_ppc/andi.c
index e3315bf15e..52ec7c4d4e 100644
--- a/post/lib_ppc/andi.c
+++ b/post/lib_ppc/andi.c
@@ -35,7 +35,7 @@
 #include <post.h>
 #include "cpu_asm.h"
 
-#if CONFIG_POST & CFG_POST_CPU
+#if CONFIG_POST & CONFIG_SYS_POST_CPU
 
 extern void cpu_post_exec_21 (ulong *code, ulong *cr, ulong *res, ulong op);
 extern ulong cpu_post_makecr (long v);
@@ -49,13 +49,13 @@ static struct cpu_post_andi_s
 } cpu_post_andi_table[] =
 {
     {
-    	OP_ANDI_,
+	OP_ANDI_,
 	0x80008000,
 	0xffff,
 	0x00008000
     },
     {
-    	OP_ANDIS_,
+	OP_ANDIS_,
 	0x80008000,
 	0xffff,
 	0x80000000
@@ -79,7 +79,7 @@ int cpu_post_test_andi (void)
 	    unsigned int reg0 = (reg + 0) % 32;
 	    unsigned int reg1 = (reg + 1) % 32;
 	    unsigned int stk = reg < 16 ? 31 : 15;
-    	    unsigned long codecr[] =
+	    unsigned long codecr[] =
 	    {
 		ASM_STW(stk, 1, -4),
 		ASM_ADDI(stk, 1, -16),
@@ -112,7 +112,7 @@ int cpu_post_test_andi (void)
     }
 
     if (flag)
-    	enable_interrupts();
+	enable_interrupts();
 
     return ret;
 }