X-Git-Url: https://git.sur5r.net/?a=blobdiff_plain;f=src%2Fca65%2Finstr.c;h=532a8748e6e24a72d582b5ac7cd6f03144a152b2;hb=10a31d006b7fe230a2cd2a233ba86e05618beec4;hp=c4513b92ab8fe2bf02b0e8a171a287d87ab71f53;hpb=7ecb4c50b1bedcf28f8b4dd936e3d28df238d41a;p=cc65 diff --git a/src/ca65/instr.c b/src/ca65/instr.c index c4513b92a..532a8748e 100644 --- a/src/ca65/instr.c +++ b/src/ca65/instr.c @@ -1,8 +1,8 @@ /*****************************************************************************/ /* */ -/* instr.c */ +/* instr.c */ /* */ -/* Instruction encoding for the ca65 macroassembler */ +/* Instruction encoding for the ca65 macroassembler */ /* */ /* */ /* */ @@ -73,6 +73,9 @@ static void PutPCRel8 (const InsDesc* Ins); static void PutPCRel16 (const InsDesc* Ins); /* Handle branches with an 16 bit distance and PER */ +static void PutPCRel4510 (const InsDesc* Ins); +/* Handle branches with a 16 bit distance for 4510 */ + static void PutBlockMove (const InsDesc* Ins); /* Handle the blockmove instructions (65816) */ @@ -90,41 +93,44 @@ static void PutSEP (const InsDesc* Ins); static void PutTAMn (const InsDesc* Ins); /* Emit a TAMn instruction (HuC6280). Since this is a two byte instruction with - * implicit addressing mode, the opcode byte in the table is actually the - * second operand byte. The TAM instruction is the more generic form, it takes - * an immediate argument. - */ +** implicit addressing mode, the opcode byte in the table is actually the +** second operand byte. The TAM instruction is the more generic form, it takes +** an immediate argument. +*/ static void PutTMA (const InsDesc* Ins); /* Emit a TMA instruction (HuC6280) with an immediate argument. Only one bit - * in the argument byte may be set. - */ +** in the argument byte may be set. +*/ static void PutTMAn (const InsDesc* Ins); /* Emit a TMAn instruction (HuC6280). Since this is a two byte instruction with - * implicit addressing mode, the opcode byte in the table is actually the - * second operand byte. The TAM instruction is the more generic form, it takes - * an immediate argument. - */ +** implicit addressing mode, the opcode byte in the table is actually the +** second operand byte. The TAM instruction is the more generic form, it takes +** an immediate argument. +*/ static void PutTST (const InsDesc* Ins); /* Emit a TST instruction (HuC6280). */ static void PutJMP (const InsDesc* Ins); /* Handle the jump instruction for the 6502. Problem is that these chips have - * a bug: If the address crosses a page, the upper byte gets not corrected and - * the instruction will fail. The PutJmp function will add a linker assertion - * to check for this case and is otherwise identical to PutAll. - */ +** a bug: If the address crosses a page, the upper byte gets not corrected and +** the instruction will fail. The PutJmp function will add a linker assertion +** to check for this case and is otherwise identical to PutAll. +*/ static void PutRTS (const InsDesc* Ins attribute ((unused))); /* Handle the RTS instruction for the 816. In smart mode emit a RTL opcode if - * the enclosing scope is FAR. - */ +** the enclosing scope is FAR. +*/ static void PutAll (const InsDesc* Ins); /* Handle all other instructions */ +static void Put4510 (const InsDesc* Ins); +/* Handle instructions of 4510 not matching any EATab */ + static void PutSweet16 (const InsDesc* Ins); /* Handle a generic sweet16 instruction */ @@ -134,7 +140,7 @@ static void PutSweet16Branch (const InsDesc* Ins); /*****************************************************************************/ -/* Data */ +/* Data */ /*****************************************************************************/ @@ -153,142 +159,147 @@ static const struct { } InsTab6502 = { sizeof (InsTab6502.Ins) / sizeof (InsTab6502.Ins[0]), { - { "ADC", 0x080A26C, 0x60, 0, PutAll }, - { "AND", 0x080A26C, 0x20, 0, PutAll }, - { "ASL", 0x000006e, 0x02, 1, PutAll }, - { "BCC", 0x0020000, 0x90, 0, PutPCRel8 }, - { "BCS", 0x0020000, 0xb0, 0, PutPCRel8 }, - { "BEQ", 0x0020000, 0xf0, 0, PutPCRel8 }, - { "BIT", 0x000000C, 0x00, 2, PutAll }, - { "BMI", 0x0020000, 0x30, 0, PutPCRel8 }, - { "BNE", 0x0020000, 0xd0, 0, PutPCRel8 }, - { "BPL", 0x0020000, 0x10, 0, PutPCRel8 }, - { "BRK", 0x0000001, 0x00, 0, PutAll }, - { "BVC", 0x0020000, 0x50, 0, PutPCRel8 }, - { "BVS", 0x0020000, 0x70, 0, PutPCRel8 }, - { "CLC", 0x0000001, 0x18, 0, PutAll }, - { "CLD", 0x0000001, 0xd8, 0, PutAll }, - { "CLI", 0x0000001, 0x58, 0, PutAll }, - { "CLV", 0x0000001, 0xb8, 0, PutAll }, - { "CMP", 0x080A26C, 0xc0, 0, PutAll }, - { "CPX", 0x080000C, 0xe0, 1, PutAll }, - { "CPY", 0x080000C, 0xc0, 1, PutAll }, - { "DEC", 0x000006C, 0x00, 3, PutAll }, - { "DEX", 0x0000001, 0xca, 0, PutAll }, - { "DEY", 0x0000001, 0x88, 0, PutAll }, - { "EOR", 0x080A26C, 0x40, 0, PutAll }, - { "INC", 0x000006c, 0x00, 4, PutAll }, - { "INX", 0x0000001, 0xe8, 0, PutAll }, - { "INY", 0x0000001, 0xc8, 0, PutAll }, - { "JMP", 0x0000808, 0x4c, 6, PutJMP }, - { "JSR", 0x0000008, 0x20, 7, PutAll }, - { "LDA", 0x080A26C, 0xa0, 0, PutAll }, - { "LDX", 0x080030C, 0xa2, 1, PutAll }, - { "LDY", 0x080006C, 0xa0, 1, PutAll }, - { "LSR", 0x000006F, 0x42, 1, PutAll }, - { "NOP", 0x0000001, 0xea, 0, PutAll }, - { "ORA", 0x080A26C, 0x00, 0, PutAll }, - { "PHA", 0x0000001, 0x48, 0, PutAll }, - { "PHP", 0x0000001, 0x08, 0, PutAll }, - { "PLA", 0x0000001, 0x68, 0, PutAll }, - { "PLP", 0x0000001, 0x28, 0, PutAll }, - { "ROL", 0x000006F, 0x22, 1, PutAll }, - { "ROR", 0x000006F, 0x62, 1, PutAll }, - { "RTI", 0x0000001, 0x40, 0, PutAll }, - { "RTS", 0x0000001, 0x60, 0, PutAll }, - { "SBC", 0x080A26C, 0xe0, 0, PutAll }, - { "SEC", 0x0000001, 0x38, 0, PutAll }, - { "SED", 0x0000001, 0xf8, 0, PutAll }, - { "SEI", 0x0000001, 0x78, 0, PutAll }, - { "STA", 0x000A26C, 0x80, 0, PutAll }, - { "STX", 0x000010c, 0x82, 1, PutAll }, - { "STY", 0x000002c, 0x80, 1, PutAll }, - { "TAX", 0x0000001, 0xaa, 0, PutAll }, - { "TAY", 0x0000001, 0xa8, 0, PutAll }, - { "TSX", 0x0000001, 0xba, 0, PutAll }, - { "TXA", 0x0000001, 0x8a, 0, PutAll }, - { "TXS", 0x0000001, 0x9a, 0, PutAll }, - { "TYA", 0x0000001, 0x98, 0, PutAll } + { "ADC", 0x080A26C, 0x60, 0, PutAll }, + { "AND", 0x080A26C, 0x20, 0, PutAll }, + { "ASL", 0x000006e, 0x02, 1, PutAll }, + { "BCC", 0x0020000, 0x90, 0, PutPCRel8 }, + { "BCS", 0x0020000, 0xb0, 0, PutPCRel8 }, + { "BEQ", 0x0020000, 0xf0, 0, PutPCRel8 }, + { "BIT", 0x000000C, 0x00, 2, PutAll }, + { "BMI", 0x0020000, 0x30, 0, PutPCRel8 }, + { "BNE", 0x0020000, 0xd0, 0, PutPCRel8 }, + { "BPL", 0x0020000, 0x10, 0, PutPCRel8 }, + { "BRK", 0x0000001, 0x00, 0, PutAll }, + { "BVC", 0x0020000, 0x50, 0, PutPCRel8 }, + { "BVS", 0x0020000, 0x70, 0, PutPCRel8 }, + { "CLC", 0x0000001, 0x18, 0, PutAll }, + { "CLD", 0x0000001, 0xd8, 0, PutAll }, + { "CLI", 0x0000001, 0x58, 0, PutAll }, + { "CLV", 0x0000001, 0xb8, 0, PutAll }, + { "CMP", 0x080A26C, 0xc0, 0, PutAll }, + { "CPX", 0x080000C, 0xe0, 1, PutAll }, + { "CPY", 0x080000C, 0xc0, 1, PutAll }, + { "DEC", 0x000006C, 0x00, 3, PutAll }, + { "DEX", 0x0000001, 0xca, 0, PutAll }, + { "DEY", 0x0000001, 0x88, 0, PutAll }, + { "EOR", 0x080A26C, 0x40, 0, PutAll }, + { "INC", 0x000006c, 0x00, 4, PutAll }, + { "INX", 0x0000001, 0xe8, 0, PutAll }, + { "INY", 0x0000001, 0xc8, 0, PutAll }, + { "JMP", 0x0000808, 0x4c, 6, PutJMP }, + { "JSR", 0x0000008, 0x20, 7, PutAll }, + { "LDA", 0x080A26C, 0xa0, 0, PutAll }, + { "LDX", 0x080030C, 0xa2, 1, PutAll }, + { "LDY", 0x080006C, 0xa0, 1, PutAll }, + { "LSR", 0x000006F, 0x42, 1, PutAll }, + { "NOP", 0x0000001, 0xea, 0, PutAll }, + { "ORA", 0x080A26C, 0x00, 0, PutAll }, + { "PHA", 0x0000001, 0x48, 0, PutAll }, + { "PHP", 0x0000001, 0x08, 0, PutAll }, + { "PLA", 0x0000001, 0x68, 0, PutAll }, + { "PLP", 0x0000001, 0x28, 0, PutAll }, + { "ROL", 0x000006F, 0x22, 1, PutAll }, + { "ROR", 0x000006F, 0x62, 1, PutAll }, + { "RTI", 0x0000001, 0x40, 0, PutAll }, + { "RTS", 0x0000001, 0x60, 0, PutAll }, + { "SBC", 0x080A26C, 0xe0, 0, PutAll }, + { "SEC", 0x0000001, 0x38, 0, PutAll }, + { "SED", 0x0000001, 0xf8, 0, PutAll }, + { "SEI", 0x0000001, 0x78, 0, PutAll }, + { "STA", 0x000A26C, 0x80, 0, PutAll }, + { "STX", 0x000010c, 0x82, 1, PutAll }, + { "STY", 0x000002c, 0x80, 1, PutAll }, + { "TAX", 0x0000001, 0xaa, 0, PutAll }, + { "TAY", 0x0000001, 0xa8, 0, PutAll }, + { "TSX", 0x0000001, 0xba, 0, PutAll }, + { "TXA", 0x0000001, 0x8a, 0, PutAll }, + { "TXS", 0x0000001, 0x9a, 0, PutAll }, + { "TYA", 0x0000001, 0x98, 0, PutAll } } }; /* Instruction table for the 6502 with illegal instructions */ static const struct { unsigned Count; - InsDesc Ins[70]; + InsDesc Ins[75]; } InsTab6502X = { sizeof (InsTab6502X.Ins) / sizeof (InsTab6502X.Ins[0]), { - { "ADC", 0x080A26C, 0x60, 0, PutAll }, + { "ADC", 0x080A26C, 0x60, 0, PutAll }, { "ALR", 0x0800000, 0x4B, 0, PutAll }, /* X */ { "ANC", 0x0800000, 0x0B, 0, PutAll }, /* X */ - { "AND", 0x080A26C, 0x20, 0, PutAll }, + { "AND", 0x080A26C, 0x20, 0, PutAll }, + { "ANE", 0x0800000, 0x8B, 0, PutAll }, /* X */ { "ARR", 0x0800000, 0x6B, 0, PutAll }, /* X */ - { "ASL", 0x000006e, 0x02, 1, PutAll }, + { "ASL", 0x000006e, 0x02, 1, PutAll }, { "AXS", 0x0800000, 0xCB, 0, PutAll }, /* X */ - { "BCC", 0x0020000, 0x90, 0, PutPCRel8 }, - { "BCS", 0x0020000, 0xb0, 0, PutPCRel8 }, - { "BEQ", 0x0020000, 0xf0, 0, PutPCRel8 }, - { "BIT", 0x000000C, 0x00, 2, PutAll }, - { "BMI", 0x0020000, 0x30, 0, PutPCRel8 }, - { "BNE", 0x0020000, 0xd0, 0, PutPCRel8 }, - { "BPL", 0x0020000, 0x10, 0, PutPCRel8 }, - { "BRK", 0x0000001, 0x00, 0, PutAll }, - { "BVC", 0x0020000, 0x50, 0, PutPCRel8 }, - { "BVS", 0x0020000, 0x70, 0, PutPCRel8 }, - { "CLC", 0x0000001, 0x18, 0, PutAll }, - { "CLD", 0x0000001, 0xd8, 0, PutAll }, - { "CLI", 0x0000001, 0x58, 0, PutAll }, - { "CLV", 0x0000001, 0xb8, 0, PutAll }, - { "CMP", 0x080A26C, 0xc0, 0, PutAll }, - { "CPX", 0x080000C, 0xe0, 1, PutAll }, - { "CPY", 0x080000C, 0xc0, 1, PutAll }, + { "BCC", 0x0020000, 0x90, 0, PutPCRel8 }, + { "BCS", 0x0020000, 0xb0, 0, PutPCRel8 }, + { "BEQ", 0x0020000, 0xf0, 0, PutPCRel8 }, + { "BIT", 0x000000C, 0x00, 2, PutAll }, + { "BMI", 0x0020000, 0x30, 0, PutPCRel8 }, + { "BNE", 0x0020000, 0xd0, 0, PutPCRel8 }, + { "BPL", 0x0020000, 0x10, 0, PutPCRel8 }, + { "BRK", 0x0000001, 0x00, 0, PutAll }, + { "BVC", 0x0020000, 0x50, 0, PutPCRel8 }, + { "BVS", 0x0020000, 0x70, 0, PutPCRel8 }, + { "CLC", 0x0000001, 0x18, 0, PutAll }, + { "CLD", 0x0000001, 0xd8, 0, PutAll }, + { "CLI", 0x0000001, 0x58, 0, PutAll }, + { "CLV", 0x0000001, 0xb8, 0, PutAll }, + { "CMP", 0x080A26C, 0xc0, 0, PutAll }, + { "CPX", 0x080000C, 0xe0, 1, PutAll }, + { "CPY", 0x080000C, 0xc0, 1, PutAll }, { "DCP", 0x000A26C, 0xC3, 0, PutAll }, /* X */ - { "DEC", 0x000006C, 0x00, 3, PutAll }, - { "DEX", 0x0000001, 0xca, 0, PutAll }, - { "DEY", 0x0000001, 0x88, 0, PutAll }, - { "EOR", 0x080A26C, 0x40, 0, PutAll }, - { "INC", 0x000006c, 0x00, 4, PutAll }, - { "INX", 0x0000001, 0xe8, 0, PutAll }, - { "INY", 0x0000001, 0xc8, 0, PutAll }, + { "DEC", 0x000006C, 0x00, 3, PutAll }, + { "DEX", 0x0000001, 0xca, 0, PutAll }, + { "DEY", 0x0000001, 0x88, 0, PutAll }, + { "EOR", 0x080A26C, 0x40, 0, PutAll }, + { "INC", 0x000006c, 0x00, 4, PutAll }, + { "INX", 0x0000001, 0xe8, 0, PutAll }, + { "INY", 0x0000001, 0xc8, 0, PutAll }, { "ISC", 0x000A26C, 0xE3, 0, PutAll }, /* X */ { "JAM", 0x0000001, 0x02, 0, PutAll }, /* X */ - { "JMP", 0x0000808, 0x4c, 6, PutJMP }, - { "JSR", 0x0000008, 0x20, 7, PutAll }, + { "JMP", 0x0000808, 0x4c, 6, PutJMP }, + { "JSR", 0x0000008, 0x20, 7, PutAll }, { "LAS", 0x0000200, 0xBB, 0, PutAll }, /* X */ - { "LAX", 0x000A30C, 0xA3, 1, PutAll }, /* X */ - { "LDA", 0x080A26C, 0xa0, 0, PutAll }, - { "LDX", 0x080030C, 0xa2, 1, PutAll }, - { "LDY", 0x080006C, 0xa0, 1, PutAll }, - { "LSR", 0x000006F, 0x42, 1, PutAll }, - { "NOP", 0x0000001, 0xea, 0, PutAll }, - { "ORA", 0x080A26C, 0x00, 0, PutAll }, - { "PHA", 0x0000001, 0x48, 0, PutAll }, - { "PHP", 0x0000001, 0x08, 0, PutAll }, - { "PLA", 0x0000001, 0x68, 0, PutAll }, - { "PLP", 0x0000001, 0x28, 0, PutAll }, + { "LAX", 0x080A30C, 0xA3, 11, PutAll }, /* X */ + { "LDA", 0x080A26C, 0xa0, 0, PutAll }, + { "LDX", 0x080030C, 0xa2, 1, PutAll }, + { "LDY", 0x080006C, 0xa0, 1, PutAll }, + { "LSR", 0x000006F, 0x42, 1, PutAll }, + { "NOP", 0x080006D, 0x00, 10, PutAll }, /* X */ + { "ORA", 0x080A26C, 0x00, 0, PutAll }, + { "PHA", 0x0000001, 0x48, 0, PutAll }, + { "PHP", 0x0000001, 0x08, 0, PutAll }, + { "PLA", 0x0000001, 0x68, 0, PutAll }, + { "PLP", 0x0000001, 0x28, 0, PutAll }, { "RLA", 0x000A26C, 0x23, 0, PutAll }, /* X */ - { "ROL", 0x000006F, 0x22, 1, PutAll }, - { "ROR", 0x000006F, 0x62, 1, PutAll }, + { "ROL", 0x000006F, 0x22, 1, PutAll }, + { "ROR", 0x000006F, 0x62, 1, PutAll }, { "RRA", 0x000A26C, 0x63, 0, PutAll }, /* X */ - { "RTI", 0x0000001, 0x40, 0, PutAll }, - { "RTS", 0x0000001, 0x60, 0, PutAll }, + { "RTI", 0x0000001, 0x40, 0, PutAll }, + { "RTS", 0x0000001, 0x60, 0, PutAll }, { "SAX", 0x000810C, 0x83, 1, PutAll }, /* X */ - { "SBC", 0x080A26C, 0xe0, 0, PutAll }, - { "SEC", 0x0000001, 0x38, 0, PutAll }, - { "SED", 0x0000001, 0xf8, 0, PutAll }, - { "SEI", 0x0000001, 0x78, 0, PutAll }, + { "SBC", 0x080A26C, 0xe0, 0, PutAll }, + { "SEC", 0x0000001, 0x38, 0, PutAll }, + { "SED", 0x0000001, 0xf8, 0, PutAll }, + { "SEI", 0x0000001, 0x78, 0, PutAll }, + { "SHA", 0x0002200, 0x93, 1, PutAll }, /* X */ + { "SHX", 0x0000200, 0x9e, 1, PutAll }, /* X */ + { "SHY", 0x0000040, 0x9c, 1, PutAll }, /* X */ { "SLO", 0x000A26C, 0x03, 0, PutAll }, /* X */ { "SRE", 0x000A26C, 0x43, 0, PutAll }, /* X */ - { "STA", 0x000A26C, 0x80, 0, PutAll }, - { "STX", 0x000010c, 0x82, 1, PutAll }, - { "STY", 0x000002c, 0x80, 1, PutAll }, - { "TAX", 0x0000001, 0xaa, 0, PutAll }, - { "TAY", 0x0000001, 0xa8, 0, PutAll }, - { "TSX", 0x0000001, 0xba, 0, PutAll }, - { "TXA", 0x0000001, 0x8a, 0, PutAll }, - { "TXS", 0x0000001, 0x9a, 0, PutAll }, - { "TYA", 0x0000001, 0x98, 0, PutAll } + { "STA", 0x000A26C, 0x80, 0, PutAll }, + { "STX", 0x000010c, 0x82, 1, PutAll }, + { "STY", 0x000002c, 0x80, 1, PutAll }, + { "TAS", 0x0000200, 0x9b, 0, PutAll }, /* X */ + { "TAX", 0x0000001, 0xaa, 0, PutAll }, + { "TAY", 0x0000001, 0xa8, 0, PutAll }, + { "TSX", 0x0000001, 0xba, 0, PutAll }, + { "TXA", 0x0000001, 0x8a, 0, PutAll }, + { "TXS", 0x0000001, 0x9a, 0, PutAll }, + { "TYA", 0x0000001, 0x98, 0, PutAll } } }; @@ -299,85 +310,197 @@ static const struct { } InsTab65SC02 = { sizeof (InsTab65SC02.Ins) / sizeof (InsTab65SC02.Ins[0]), { - { "ADC", 0x080A66C, 0x60, 0, PutAll }, - { "AND", 0x080A66C, 0x20, 0, PutAll }, - { "ASL", 0x000006e, 0x02, 1, PutAll }, - { "BCC", 0x0020000, 0x90, 0, PutPCRel8 }, - { "BCS", 0x0020000, 0xb0, 0, PutPCRel8 }, - { "BEQ", 0x0020000, 0xf0, 0, PutPCRel8 }, - { "BIT", 0x0A0006C, 0x00, 2, PutAll }, - { "BMI", 0x0020000, 0x30, 0, PutPCRel8 }, - { "BNE", 0x0020000, 0xd0, 0, PutPCRel8 }, - { "BPL", 0x0020000, 0x10, 0, PutPCRel8 }, - { "BRA", 0x0020000, 0x80, 0, PutPCRel8 }, - { "BRK", 0x0000001, 0x00, 0, PutAll }, - { "BVC", 0x0020000, 0x50, 0, PutPCRel8 }, - { "BVS", 0x0020000, 0x70, 0, PutPCRel8 }, - { "CLC", 0x0000001, 0x18, 0, PutAll }, - { "CLD", 0x0000001, 0xd8, 0, PutAll }, - { "CLI", 0x0000001, 0x58, 0, PutAll }, - { "CLV", 0x0000001, 0xb8, 0, PutAll }, - { "CMP", 0x080A66C, 0xc0, 0, PutAll }, - { "CPX", 0x080000C, 0xe0, 1, PutAll }, - { "CPY", 0x080000C, 0xc0, 1, PutAll }, - { "DEA", 0x0000001, 0x00, 3, PutAll }, /* == DEC */ - { "DEC", 0x000006F, 0x00, 3, PutAll }, - { "DEX", 0x0000001, 0xca, 0, PutAll }, - { "DEY", 0x0000001, 0x88, 0, PutAll }, - { "EOR", 0x080A66C, 0x40, 0, PutAll }, - { "INA", 0x0000001, 0x00, 4, PutAll }, /* == INC */ - { "INC", 0x000006f, 0x00, 4, PutAll }, - { "INX", 0x0000001, 0xe8, 0, PutAll }, - { "INY", 0x0000001, 0xc8, 0, PutAll }, - { "JMP", 0x0010808, 0x4c, 6, PutAll }, - { "JSR", 0x0000008, 0x20, 7, PutAll }, - { "LDA", 0x080A66C, 0xa0, 0, PutAll }, - { "LDX", 0x080030C, 0xa2, 1, PutAll }, - { "LDY", 0x080006C, 0xa0, 1, PutAll }, - { "LSR", 0x000006F, 0x42, 1, PutAll }, - { "NOP", 0x0000001, 0xea, 0, PutAll }, - { "ORA", 0x080A66C, 0x00, 0, PutAll }, - { "PHA", 0x0000001, 0x48, 0, PutAll }, - { "PHP", 0x0000001, 0x08, 0, PutAll }, - { "PHX", 0x0000001, 0xda, 0, PutAll }, - { "PHY", 0x0000001, 0x5a, 0, PutAll }, - { "PLA", 0x0000001, 0x68, 0, PutAll }, - { "PLP", 0x0000001, 0x28, 0, PutAll }, - { "PLX", 0x0000001, 0xfa, 0, PutAll }, - { "PLY", 0x0000001, 0x7a, 0, PutAll }, - { "ROL", 0x000006F, 0x22, 1, PutAll }, - { "ROR", 0x000006F, 0x62, 1, PutAll }, - { "RTI", 0x0000001, 0x40, 0, PutAll }, - { "RTS", 0x0000001, 0x60, 0, PutAll }, - { "SBC", 0x080A66C, 0xe0, 0, PutAll }, - { "SEC", 0x0000001, 0x38, 0, PutAll }, - { "SED", 0x0000001, 0xf8, 0, PutAll }, - { "SEI", 0x0000001, 0x78, 0, PutAll }, - { "STA", 0x000A66C, 0x80, 0, PutAll }, - { "STX", 0x000010c, 0x82, 1, PutAll }, - { "STY", 0x000002c, 0x80, 1, PutAll }, - { "STZ", 0x000006c, 0x04, 5, PutAll }, - { "TAX", 0x0000001, 0xaa, 0, PutAll }, - { "TAY", 0x0000001, 0xa8, 0, PutAll }, - { "TRB", 0x000000c, 0x10, 1, PutAll }, - { "TSB", 0x000000c, 0x00, 1, PutAll }, - { "TSX", 0x0000001, 0xba, 0, PutAll }, - { "TXA", 0x0000001, 0x8a, 0, PutAll }, - { "TXS", 0x0000001, 0x9a, 0, PutAll }, - { "TYA", 0x0000001, 0x98, 0, PutAll } + { "ADC", 0x080A66C, 0x60, 0, PutAll }, + { "AND", 0x080A66C, 0x20, 0, PutAll }, + { "ASL", 0x000006e, 0x02, 1, PutAll }, + { "BCC", 0x0020000, 0x90, 0, PutPCRel8 }, + { "BCS", 0x0020000, 0xb0, 0, PutPCRel8 }, + { "BEQ", 0x0020000, 0xf0, 0, PutPCRel8 }, + { "BIT", 0x0A0006C, 0x00, 2, PutAll }, + { "BMI", 0x0020000, 0x30, 0, PutPCRel8 }, + { "BNE", 0x0020000, 0xd0, 0, PutPCRel8 }, + { "BPL", 0x0020000, 0x10, 0, PutPCRel8 }, + { "BRA", 0x0020000, 0x80, 0, PutPCRel8 }, + { "BRK", 0x0000001, 0x00, 0, PutAll }, + { "BVC", 0x0020000, 0x50, 0, PutPCRel8 }, + { "BVS", 0x0020000, 0x70, 0, PutPCRel8 }, + { "CLC", 0x0000001, 0x18, 0, PutAll }, + { "CLD", 0x0000001, 0xd8, 0, PutAll }, + { "CLI", 0x0000001, 0x58, 0, PutAll }, + { "CLV", 0x0000001, 0xb8, 0, PutAll }, + { "CMP", 0x080A66C, 0xc0, 0, PutAll }, + { "CPX", 0x080000C, 0xe0, 1, PutAll }, + { "CPY", 0x080000C, 0xc0, 1, PutAll }, + { "DEA", 0x0000001, 0x00, 3, PutAll }, /* == DEC */ + { "DEC", 0x000006F, 0x00, 3, PutAll }, + { "DEX", 0x0000001, 0xca, 0, PutAll }, + { "DEY", 0x0000001, 0x88, 0, PutAll }, + { "EOR", 0x080A66C, 0x40, 0, PutAll }, + { "INA", 0x0000001, 0x00, 4, PutAll }, /* == INC */ + { "INC", 0x000006f, 0x00, 4, PutAll }, + { "INX", 0x0000001, 0xe8, 0, PutAll }, + { "INY", 0x0000001, 0xc8, 0, PutAll }, + { "JMP", 0x0010808, 0x4c, 6, PutAll }, + { "JSR", 0x0000008, 0x20, 7, PutAll }, + { "LDA", 0x080A66C, 0xa0, 0, PutAll }, + { "LDX", 0x080030C, 0xa2, 1, PutAll }, + { "LDY", 0x080006C, 0xa0, 1, PutAll }, + { "LSR", 0x000006F, 0x42, 1, PutAll }, + { "NOP", 0x0000001, 0xea, 0, PutAll }, + { "ORA", 0x080A66C, 0x00, 0, PutAll }, + { "PHA", 0x0000001, 0x48, 0, PutAll }, + { "PHP", 0x0000001, 0x08, 0, PutAll }, + { "PHX", 0x0000001, 0xda, 0, PutAll }, + { "PHY", 0x0000001, 0x5a, 0, PutAll }, + { "PLA", 0x0000001, 0x68, 0, PutAll }, + { "PLP", 0x0000001, 0x28, 0, PutAll }, + { "PLX", 0x0000001, 0xfa, 0, PutAll }, + { "PLY", 0x0000001, 0x7a, 0, PutAll }, + { "ROL", 0x000006F, 0x22, 1, PutAll }, + { "ROR", 0x000006F, 0x62, 1, PutAll }, + { "RTI", 0x0000001, 0x40, 0, PutAll }, + { "RTS", 0x0000001, 0x60, 0, PutAll }, + { "SBC", 0x080A66C, 0xe0, 0, PutAll }, + { "SEC", 0x0000001, 0x38, 0, PutAll }, + { "SED", 0x0000001, 0xf8, 0, PutAll }, + { "SEI", 0x0000001, 0x78, 0, PutAll }, + { "STA", 0x000A66C, 0x80, 0, PutAll }, + { "STX", 0x000010c, 0x82, 1, PutAll }, + { "STY", 0x000002c, 0x80, 1, PutAll }, + { "STZ", 0x000006c, 0x04, 5, PutAll }, + { "TAX", 0x0000001, 0xaa, 0, PutAll }, + { "TAY", 0x0000001, 0xa8, 0, PutAll }, + { "TRB", 0x000000c, 0x10, 1, PutAll }, + { "TSB", 0x000000c, 0x00, 1, PutAll }, + { "TSX", 0x0000001, 0xba, 0, PutAll }, + { "TXA", 0x0000001, 0x8a, 0, PutAll }, + { "TXS", 0x0000001, 0x9a, 0, PutAll }, + { "TYA", 0x0000001, 0x98, 0, PutAll } } }; /* Instruction table for the 65C02 */ static const struct { unsigned Count; - InsDesc Ins[98]; + InsDesc Ins[100]; } InsTab65C02 = { sizeof (InsTab65C02.Ins) / sizeof (InsTab65C02.Ins[0]), { - { "ADC", 0x080A66C, 0x60, 0, PutAll }, - { "AND", 0x080A66C, 0x20, 0, PutAll }, - { "ASL", 0x000006e, 0x02, 1, PutAll }, + { "ADC", 0x080A66C, 0x60, 0, PutAll }, + { "AND", 0x080A66C, 0x20, 0, PutAll }, + { "ASL", 0x000006e, 0x02, 1, PutAll }, + { "BBR0", 0x0000000, 0x0F, 0, PutBitBranch }, + { "BBR1", 0x0000000, 0x1F, 0, PutBitBranch }, + { "BBR2", 0x0000000, 0x2F, 0, PutBitBranch }, + { "BBR3", 0x0000000, 0x3F, 0, PutBitBranch }, + { "BBR4", 0x0000000, 0x4F, 0, PutBitBranch }, + { "BBR5", 0x0000000, 0x5F, 0, PutBitBranch }, + { "BBR6", 0x0000000, 0x6F, 0, PutBitBranch }, + { "BBR7", 0x0000000, 0x7F, 0, PutBitBranch }, + { "BBS0", 0x0000000, 0x8F, 0, PutBitBranch }, + { "BBS1", 0x0000000, 0x9F, 0, PutBitBranch }, + { "BBS2", 0x0000000, 0xAF, 0, PutBitBranch }, + { "BBS3", 0x0000000, 0xBF, 0, PutBitBranch }, + { "BBS4", 0x0000000, 0xCF, 0, PutBitBranch }, + { "BBS5", 0x0000000, 0xDF, 0, PutBitBranch }, + { "BBS6", 0x0000000, 0xEF, 0, PutBitBranch }, + { "BBS7", 0x0000000, 0xFF, 0, PutBitBranch }, + { "BCC", 0x0020000, 0x90, 0, PutPCRel8 }, + { "BCS", 0x0020000, 0xb0, 0, PutPCRel8 }, + { "BEQ", 0x0020000, 0xf0, 0, PutPCRel8 }, + { "BIT", 0x0A0006C, 0x00, 2, PutAll }, + { "BMI", 0x0020000, 0x30, 0, PutPCRel8 }, + { "BNE", 0x0020000, 0xd0, 0, PutPCRel8 }, + { "BPL", 0x0020000, 0x10, 0, PutPCRel8 }, + { "BRA", 0x0020000, 0x80, 0, PutPCRel8 }, + { "BRK", 0x0000001, 0x00, 0, PutAll }, + { "BVC", 0x0020000, 0x50, 0, PutPCRel8 }, + { "BVS", 0x0020000, 0x70, 0, PutPCRel8 }, + { "CLC", 0x0000001, 0x18, 0, PutAll }, + { "CLD", 0x0000001, 0xd8, 0, PutAll }, + { "CLI", 0x0000001, 0x58, 0, PutAll }, + { "CLV", 0x0000001, 0xb8, 0, PutAll }, + { "CMP", 0x080A66C, 0xc0, 0, PutAll }, + { "CPX", 0x080000C, 0xe0, 1, PutAll }, + { "CPY", 0x080000C, 0xc0, 1, PutAll }, + { "DEA", 0x0000001, 0x00, 3, PutAll }, /* == DEC */ + { "DEC", 0x000006F, 0x00, 3, PutAll }, + { "DEX", 0x0000001, 0xca, 0, PutAll }, + { "DEY", 0x0000001, 0x88, 0, PutAll }, + { "EOR", 0x080A66C, 0x40, 0, PutAll }, + { "INA", 0x0000001, 0x00, 4, PutAll }, /* == INC */ + { "INC", 0x000006f, 0x00, 4, PutAll }, + { "INX", 0x0000001, 0xe8, 0, PutAll }, + { "INY", 0x0000001, 0xc8, 0, PutAll }, + { "JMP", 0x0010808, 0x4c, 6, PutAll }, + { "JSR", 0x0000008, 0x20, 7, PutAll }, + { "LDA", 0x080A66C, 0xa0, 0, PutAll }, + { "LDX", 0x080030C, 0xa2, 1, PutAll }, + { "LDY", 0x080006C, 0xa0, 1, PutAll }, + { "LSR", 0x000006F, 0x42, 1, PutAll }, + { "NOP", 0x0000001, 0xea, 0, PutAll }, + { "ORA", 0x080A66C, 0x00, 0, PutAll }, + { "PHA", 0x0000001, 0x48, 0, PutAll }, + { "PHP", 0x0000001, 0x08, 0, PutAll }, + { "PHX", 0x0000001, 0xda, 0, PutAll }, + { "PHY", 0x0000001, 0x5a, 0, PutAll }, + { "PLA", 0x0000001, 0x68, 0, PutAll }, + { "PLP", 0x0000001, 0x28, 0, PutAll }, + { "PLX", 0x0000001, 0xfa, 0, PutAll }, + { "PLY", 0x0000001, 0x7a, 0, PutAll }, + { "RMB0", 0x0000004, 0x07, 1, PutAll }, + { "RMB1", 0x0000004, 0x17, 1, PutAll }, + { "RMB2", 0x0000004, 0x27, 1, PutAll }, + { "RMB3", 0x0000004, 0x37, 1, PutAll }, + { "RMB4", 0x0000004, 0x47, 1, PutAll }, + { "RMB5", 0x0000004, 0x57, 1, PutAll }, + { "RMB6", 0x0000004, 0x67, 1, PutAll }, + { "RMB7", 0x0000004, 0x77, 1, PutAll }, + { "ROL", 0x000006F, 0x22, 1, PutAll }, + { "ROR", 0x000006F, 0x62, 1, PutAll }, + { "RTI", 0x0000001, 0x40, 0, PutAll }, + { "RTS", 0x0000001, 0x60, 0, PutAll }, + { "SBC", 0x080A66C, 0xe0, 0, PutAll }, + { "SEC", 0x0000001, 0x38, 0, PutAll }, + { "SED", 0x0000001, 0xf8, 0, PutAll }, + { "SEI", 0x0000001, 0x78, 0, PutAll }, + { "SMB0", 0x0000004, 0x87, 1, PutAll }, + { "SMB1", 0x0000004, 0x97, 1, PutAll }, + { "SMB2", 0x0000004, 0xA7, 1, PutAll }, + { "SMB3", 0x0000004, 0xB7, 1, PutAll }, + { "SMB4", 0x0000004, 0xC7, 1, PutAll }, + { "SMB5", 0x0000004, 0xD7, 1, PutAll }, + { "SMB6", 0x0000004, 0xE7, 1, PutAll }, + { "SMB7", 0x0000004, 0xF7, 1, PutAll }, + { "STA", 0x000A66C, 0x80, 0, PutAll }, + { "STP", 0x0000001, 0xdb, 0, PutAll }, + { "STX", 0x000010c, 0x82, 1, PutAll }, + { "STY", 0x000002c, 0x80, 1, PutAll }, + { "STZ", 0x000006c, 0x04, 5, PutAll }, + { "TAX", 0x0000001, 0xaa, 0, PutAll }, + { "TAY", 0x0000001, 0xa8, 0, PutAll }, + { "TRB", 0x000000c, 0x10, 1, PutAll }, + { "TSB", 0x000000c, 0x00, 1, PutAll }, + { "TSX", 0x0000001, 0xba, 0, PutAll }, + { "TXA", 0x0000001, 0x8a, 0, PutAll }, + { "TXS", 0x0000001, 0x9a, 0, PutAll }, + { "TYA", 0x0000001, 0x98, 0, PutAll }, + { "WAI", 0x0000001, 0xcb, 0, PutAll } + } +}; + +/* Instruction table for the 4510 */ +static const struct { + unsigned Count; + InsDesc Ins[133]; +} InsTab4510 = { + sizeof (InsTab4510.Ins) / sizeof (InsTab4510.Ins[0]), + { + { "ADC", 0x080A66C, 0x60, 0, PutAll }, + { "AND", 0x080A66C, 0x20, 0, PutAll }, + { "ASL", 0x000006e, 0x02, 1, PutAll }, + { "ASR", 0x0000026, 0x43, 0, Put4510 }, + { "ASW", 0x0000008, 0xcb, 6, PutAll }, { "BBR0", 0x0000000, 0x0F, 0, PutBitBranch }, { "BBR1", 0x0000000, 0x1F, 0, PutBitBranch }, { "BBR2", 0x0000000, 0x2F, 0, PutBitBranch }, @@ -394,206 +517,235 @@ static const struct { { "BBS5", 0x0000000, 0xDF, 0, PutBitBranch }, { "BBS6", 0x0000000, 0xEF, 0, PutBitBranch }, { "BBS7", 0x0000000, 0xFF, 0, PutBitBranch }, - { "BCC", 0x0020000, 0x90, 0, PutPCRel8 }, - { "BCS", 0x0020000, 0xb0, 0, PutPCRel8 }, - { "BEQ", 0x0020000, 0xf0, 0, PutPCRel8 }, - { "BIT", 0x0A0006C, 0x00, 2, PutAll }, - { "BMI", 0x0020000, 0x30, 0, PutPCRel8 }, - { "BNE", 0x0020000, 0xd0, 0, PutPCRel8 }, - { "BPL", 0x0020000, 0x10, 0, PutPCRel8 }, - { "BRA", 0x0020000, 0x80, 0, PutPCRel8 }, - { "BRK", 0x0000001, 0x00, 0, PutAll }, - { "BVC", 0x0020000, 0x50, 0, PutPCRel8 }, - { "BVS", 0x0020000, 0x70, 0, PutPCRel8 }, - { "CLC", 0x0000001, 0x18, 0, PutAll }, - { "CLD", 0x0000001, 0xd8, 0, PutAll }, - { "CLI", 0x0000001, 0x58, 0, PutAll }, - { "CLV", 0x0000001, 0xb8, 0, PutAll }, - { "CMP", 0x080A66C, 0xc0, 0, PutAll }, - { "CPX", 0x080000C, 0xe0, 1, PutAll }, - { "CPY", 0x080000C, 0xc0, 1, PutAll }, - { "DEA", 0x0000001, 0x00, 3, PutAll }, /* == DEC */ - { "DEC", 0x000006F, 0x00, 3, PutAll }, - { "DEX", 0x0000001, 0xca, 0, PutAll }, - { "DEY", 0x0000001, 0x88, 0, PutAll }, - { "EOR", 0x080A66C, 0x40, 0, PutAll }, - { "INA", 0x0000001, 0x00, 4, PutAll }, /* == INC */ - { "INC", 0x000006f, 0x00, 4, PutAll }, - { "INX", 0x0000001, 0xe8, 0, PutAll }, - { "INY", 0x0000001, 0xc8, 0, PutAll }, - { "JMP", 0x0010808, 0x4c, 6, PutAll }, - { "JSR", 0x0000008, 0x20, 7, PutAll }, - { "LDA", 0x080A66C, 0xa0, 0, PutAll }, - { "LDX", 0x080030C, 0xa2, 1, PutAll }, - { "LDY", 0x080006C, 0xa0, 1, PutAll }, - { "LSR", 0x000006F, 0x42, 1, PutAll }, - { "NOP", 0x0000001, 0xea, 0, PutAll }, - { "ORA", 0x080A66C, 0x00, 0, PutAll }, - { "PHA", 0x0000001, 0x48, 0, PutAll }, - { "PHP", 0x0000001, 0x08, 0, PutAll }, - { "PHX", 0x0000001, 0xda, 0, PutAll }, - { "PHY", 0x0000001, 0x5a, 0, PutAll }, - { "PLA", 0x0000001, 0x68, 0, PutAll }, - { "PLP", 0x0000001, 0x28, 0, PutAll }, - { "PLX", 0x0000001, 0xfa, 0, PutAll }, - { "PLY", 0x0000001, 0x7a, 0, PutAll }, - { "RMB0", 0x0000004, 0x07, 1, PutAll }, - { "RMB1", 0x0000004, 0x17, 1, PutAll }, - { "RMB2", 0x0000004, 0x27, 1, PutAll }, - { "RMB3", 0x0000004, 0x37, 1, PutAll }, - { "RMB4", 0x0000004, 0x47, 1, PutAll }, - { "RMB5", 0x0000004, 0x57, 1, PutAll }, - { "RMB6", 0x0000004, 0x67, 1, PutAll }, - { "RMB7", 0x0000004, 0x77, 1, PutAll }, - { "ROL", 0x000006F, 0x22, 1, PutAll }, - { "ROR", 0x000006F, 0x62, 1, PutAll }, - { "RTI", 0x0000001, 0x40, 0, PutAll }, - { "RTS", 0x0000001, 0x60, 0, PutAll }, - { "SBC", 0x080A66C, 0xe0, 0, PutAll }, - { "SEC", 0x0000001, 0x38, 0, PutAll }, - { "SED", 0x0000001, 0xf8, 0, PutAll }, - { "SEI", 0x0000001, 0x78, 0, PutAll }, - { "SMB0", 0x0000004, 0x87, 1, PutAll }, - { "SMB1", 0x0000004, 0x97, 1, PutAll }, - { "SMB2", 0x0000004, 0xA7, 1, PutAll }, - { "SMB3", 0x0000004, 0xB7, 1, PutAll }, - { "SMB4", 0x0000004, 0xC7, 1, PutAll }, - { "SMB5", 0x0000004, 0xD7, 1, PutAll }, - { "SMB6", 0x0000004, 0xE7, 1, PutAll }, - { "SMB7", 0x0000004, 0xF7, 1, PutAll }, - { "STA", 0x000A66C, 0x80, 0, PutAll }, - { "STX", 0x000010c, 0x82, 1, PutAll }, - { "STY", 0x000002c, 0x80, 1, PutAll }, - { "STZ", 0x000006c, 0x04, 5, PutAll }, - { "TAX", 0x0000001, 0xaa, 0, PutAll }, - { "TAY", 0x0000001, 0xa8, 0, PutAll }, - { "TRB", 0x000000c, 0x10, 1, PutAll }, - { "TSB", 0x000000c, 0x00, 1, PutAll }, - { "TSX", 0x0000001, 0xba, 0, PutAll }, - { "TXA", 0x0000001, 0x8a, 0, PutAll }, - { "TXS", 0x0000001, 0x9a, 0, PutAll }, - { "TYA", 0x0000001, 0x98, 0, PutAll } + { "BCC", 0x0020000, 0x90, 0, PutPCRel8 }, + { "BCS", 0x0020000, 0xb0, 0, PutPCRel8 }, + { "BEQ", 0x0020000, 0xf0, 0, PutPCRel8 }, + { "BIT", 0x0A0006C, 0x00, 2, PutAll }, + { "BMI", 0x0020000, 0x30, 0, PutPCRel8 }, + { "BNE", 0x0020000, 0xd0, 0, PutPCRel8 }, + { "BPL", 0x0020000, 0x10, 0, PutPCRel8 }, + { "BRA", 0x0020000, 0x80, 0, PutPCRel8 }, + { "BRK", 0x0000001, 0x00, 0, PutAll }, + { "BSR", 0x0040000, 0x63, 0, PutPCRel4510 }, + { "BVC", 0x0020000, 0x50, 0, PutPCRel8 }, + { "BVS", 0x0020000, 0x70, 0, PutPCRel8 }, + { "CLC", 0x0000001, 0x18, 0, PutAll }, + { "CLD", 0x0000001, 0xd8, 0, PutAll }, + { "CLE", 0x0000001, 0x02, 0, PutAll }, + { "CLI", 0x0000001, 0x58, 0, PutAll }, + { "CLV", 0x0000001, 0xb8, 0, PutAll }, + { "CMP", 0x080A66C, 0xc0, 0, PutAll }, + { "CPX", 0x080000C, 0xe0, 1, PutAll }, + { "CPY", 0x080000C, 0xc0, 1, PutAll }, + { "CPZ", 0x080000C, 0xd0, 1, Put4510 }, + { "DEA", 0x0000001, 0x00, 3, PutAll }, /* == DEC */ + { "DEC", 0x000006F, 0x00, 3, PutAll }, + { "DEW", 0x0000004, 0xc3, 9, PutAll }, + { "DEX", 0x0000001, 0xca, 0, PutAll }, + { "DEY", 0x0000001, 0x88, 0, PutAll }, + { "DEZ", 0x0000001, 0x3B, 0, PutAll }, + { "EOM", 0x0000001, 0xea, 0, PutAll }, + { "EOR", 0x080A66C, 0x40, 0, PutAll }, + { "INA", 0x0000001, 0x00, 4, PutAll }, /* == INC */ + { "INC", 0x000006f, 0x00, 4, PutAll }, + { "INW", 0x0000004, 0xe3, 9, PutAll }, + { "INX", 0x0000001, 0xe8, 0, PutAll }, + { "INY", 0x0000001, 0xc8, 0, PutAll }, + { "INZ", 0x0000001, 0x1B, 0, PutAll }, + { "JMP", 0x0010808, 0x4c, 6, PutAll }, + { "JSR", 0x0010808, 0x20, 7, Put4510 }, + { "LBCC", 0x0040000, 0x93, 0, PutPCRel4510 }, + { "LBCS", 0x0040000, 0xb3, 0, PutPCRel4510 }, + { "LBEQ", 0x0040000, 0xf3, 0, PutPCRel4510 }, + { "LBMI", 0x0040000, 0x33, 0, PutPCRel4510 }, + { "LBNE", 0x0040000, 0xd3, 0, PutPCRel4510 }, + { "LBPL", 0x0040000, 0x13, 0, PutPCRel4510 }, + { "LBRA", 0x0040000, 0x83, 0, PutPCRel4510 }, + { "LBVC", 0x0040000, 0x53, 0, PutPCRel4510 }, + { "LBVS", 0x0040000, 0x73, 0, PutPCRel4510 }, + { "LDA", 0x090A66C, 0xa0, 0, Put4510 }, + { "LDX", 0x080030C, 0xa2, 1, PutAll }, + { "LDY", 0x080006C, 0xa0, 1, PutAll }, + { "LDZ", 0x0800048, 0xa3, 1, Put4510 }, + { "LSR", 0x000006F, 0x42, 1, PutAll }, + { "MAP", 0x0000001, 0x5C, 0, PutAll }, + { "NEG", 0x0000001, 0x42, 0, PutAll }, + { "NOP", 0x0000001, 0xea, 0, PutAll }, /* == EOM */ + { "ORA", 0x080A66C, 0x00, 0, PutAll }, + { "PHA", 0x0000001, 0x48, 0, PutAll }, + { "PHD", 0x8000008, 0xf4, 1, PutAll }, /* == PHW */ + { "PHP", 0x0000001, 0x08, 0, PutAll }, + { "PHW", 0x8000008, 0xf4, 1, PutAll }, + { "PHX", 0x0000001, 0xda, 0, PutAll }, + { "PHY", 0x0000001, 0x5a, 0, PutAll }, + { "PHZ", 0x0000001, 0xdb, 0, PutAll }, + { "PLA", 0x0000001, 0x68, 0, PutAll }, + { "PLP", 0x0000001, 0x28, 0, PutAll }, + { "PLX", 0x0000001, 0xfa, 0, PutAll }, + { "PLY", 0x0000001, 0x7a, 0, PutAll }, + { "PLZ", 0x0000001, 0xfb, 0, PutAll }, + { "RMB0", 0x0000004, 0x07, 1, PutAll }, + { "RMB1", 0x0000004, 0x17, 1, PutAll }, + { "RMB2", 0x0000004, 0x27, 1, PutAll }, + { "RMB3", 0x0000004, 0x37, 1, PutAll }, + { "RMB4", 0x0000004, 0x47, 1, PutAll }, + { "RMB5", 0x0000004, 0x57, 1, PutAll }, + { "RMB6", 0x0000004, 0x67, 1, PutAll }, + { "RMB7", 0x0000004, 0x77, 1, PutAll }, + { "ROL", 0x000006F, 0x22, 1, PutAll }, + { "ROR", 0x000006F, 0x62, 1, PutAll }, + { "ROW", 0x0000008, 0xeb, 6, PutAll }, + { "RTI", 0x0000001, 0x40, 0, PutAll }, + { "RTN", 0x0800000, 0x62, 1, PutAll }, + { "RTS", 0x0000001, 0x60, 0, PutAll }, + { "SBC", 0x080A66C, 0xe0, 0, PutAll }, + { "SEC", 0x0000001, 0x38, 0, PutAll }, + { "SED", 0x0000001, 0xf8, 0, PutAll }, + { "SEE", 0x0000001, 0x03, 0, PutAll }, + { "SEI", 0x0000001, 0x78, 0, PutAll }, + { "SMB0", 0x0000004, 0x87, 1, PutAll }, + { "SMB1", 0x0000004, 0x97, 1, PutAll }, + { "SMB2", 0x0000004, 0xA7, 1, PutAll }, + { "SMB3", 0x0000004, 0xB7, 1, PutAll }, + { "SMB4", 0x0000004, 0xC7, 1, PutAll }, + { "SMB5", 0x0000004, 0xD7, 1, PutAll }, + { "SMB6", 0x0000004, 0xE7, 1, PutAll }, + { "SMB7", 0x0000004, 0xF7, 1, PutAll }, + { "STA", 0x010A66C, 0x80, 0, Put4510 }, + { "STX", 0x000030c, 0x82, 1, Put4510 }, + { "STY", 0x000006c, 0x80, 1, Put4510 }, + { "STZ", 0x000006c, 0x04, 5, PutAll }, + { "TAB", 0x0000001, 0x5b, 0, PutAll }, + { "TAX", 0x0000001, 0xaa, 0, PutAll }, + { "TAY", 0x0000001, 0xa8, 0, PutAll }, + { "TAZ", 0x0000001, 0x4b, 0, PutAll }, + { "TBA", 0x0000001, 0x7b, 0, PutAll }, + { "TRB", 0x000000c, 0x10, 1, PutAll }, + { "TSB", 0x000000c, 0x00, 1, PutAll }, + { "TSX", 0x0000001, 0xba, 0, PutAll }, + { "TSY", 0x0000001, 0x0b, 0, PutAll }, + { "TXA", 0x0000001, 0x8a, 0, PutAll }, + { "TXS", 0x0000001, 0x9a, 0, PutAll }, + { "TYA", 0x0000001, 0x98, 0, PutAll }, + { "TYS", 0x0000001, 0x2b, 0, PutAll }, + { "TZA", 0x0000001, 0x6b, 0, PutAll }, } }; /* Instruction table for the 65816 */ static const struct { unsigned Count; - InsDesc Ins[99]; + InsDesc Ins[100]; } InsTab65816 = { sizeof (InsTab65816.Ins) / sizeof (InsTab65816.Ins[0]), { - { "ADC", 0x0b8f6fc, 0x60, 0, PutAll }, - { "AND", 0x0b8f6fc, 0x20, 0, PutAll }, - { "ASL", 0x000006e, 0x02, 1, PutAll }, - { "BCC", 0x0020000, 0x90, 0, PutPCRel8 }, - { "BCS", 0x0020000, 0xb0, 0, PutPCRel8 }, - { "BEQ", 0x0020000, 0xf0, 0, PutPCRel8 }, - { "BIT", 0x0a0006c, 0x00, 2, PutAll }, - { "BMI", 0x0020000, 0x30, 0, PutPCRel8 }, - { "BNE", 0x0020000, 0xd0, 0, PutPCRel8 }, - { "BPL", 0x0020000, 0x10, 0, PutPCRel8 }, - { "BRA", 0x0020000, 0x80, 0, PutPCRel8 }, - { "BRK", 0x0000001, 0x00, 0, PutAll }, - { "BRL", 0x0040000, 0x82, 0, PutPCRel16 }, - { "BVC", 0x0020000, 0x50, 0, PutPCRel8 }, - { "BVS", 0x0020000, 0x70, 0, PutPCRel8 }, - { "CLC", 0x0000001, 0x18, 0, PutAll }, - { "CLD", 0x0000001, 0xd8, 0, PutAll }, - { "CLI", 0x0000001, 0x58, 0, PutAll }, - { "CLV", 0x0000001, 0xb8, 0, PutAll }, - { "CMP", 0x0b8f6fc, 0xc0, 0, PutAll }, - { "COP", 0x0000004, 0x02, 6, PutAll }, - { "CPA", 0x0b8f6fc, 0xc0, 0, PutAll }, /* == CMP */ - { "CPX", 0x0c0000c, 0xe0, 1, PutAll }, - { "CPY", 0x0c0000c, 0xc0, 1, PutAll }, - { "DEA", 0x0000001, 0x00, 3, PutAll }, /* == DEC */ - { "DEC", 0x000006F, 0x00, 3, PutAll }, - { "DEX", 0x0000001, 0xca, 0, PutAll }, - { "DEY", 0x0000001, 0x88, 0, PutAll }, - { "EOR", 0x0b8f6fc, 0x40, 0, PutAll }, - { "INA", 0x0000001, 0x00, 4, PutAll }, /* == INC */ - { "INC", 0x000006F, 0x00, 4, PutAll }, - { "INX", 0x0000001, 0xe8, 0, PutAll }, - { "INY", 0x0000001, 0xc8, 0, PutAll }, - { "JML", 0x0000810, 0x5c, 1, PutAll }, - { "JMP", 0x0010818, 0x4c, 6, PutAll }, - { "JSL", 0x0000010, 0x20, 7, PutAll }, - { "JSR", 0x0010018, 0x20, 7, PutAll }, - { "LDA", 0x0b8f6fc, 0xa0, 0, PutAll }, - { "LDX", 0x0c0030c, 0xa2, 1, PutAll }, - { "LDY", 0x0c0006c, 0xa0, 1, PutAll }, - { "LSR", 0x000006F, 0x42, 1, PutAll }, - { "MVN", 0x1000000, 0x54, 0, PutBlockMove }, - { "MVP", 0x1000000, 0x44, 0, PutBlockMove }, - { "NOP", 0x0000001, 0xea, 0, PutAll }, - { "ORA", 0x0b8f6fc, 0x00, 0, PutAll }, - { "PEA", 0x0000008, 0xf4, 6, PutAll }, - { "PEI", 0x0000400, 0xd4, 1, PutAll }, - { "PER", 0x0040000, 0x62, 0, PutPCRel16 }, - { "PHA", 0x0000001, 0x48, 0, PutAll }, - { "PHB", 0x0000001, 0x8b, 0, PutAll }, - { "PHD", 0x0000001, 0x0b, 0, PutAll }, - { "PHK", 0x0000001, 0x4b, 0, PutAll }, - { "PHP", 0x0000001, 0x08, 0, PutAll }, - { "PHX", 0x0000001, 0xda, 0, PutAll }, - { "PHY", 0x0000001, 0x5a, 0, PutAll }, - { "PLA", 0x0000001, 0x68, 0, PutAll }, - { "PLB", 0x0000001, 0xab, 0, PutAll }, - { "PLD", 0x0000001, 0x2b, 0, PutAll }, - { "PLP", 0x0000001, 0x28, 0, PutAll }, - { "PLX", 0x0000001, 0xfa, 0, PutAll }, - { "PLY", 0x0000001, 0x7a, 0, PutAll }, - { "REP", 0x0800000, 0xc2, 1, PutREP }, - { "ROL", 0x000006F, 0x22, 1, PutAll }, - { "ROR", 0x000006F, 0x62, 1, PutAll }, - { "RTI", 0x0000001, 0x40, 0, PutAll }, - { "RTL", 0x0000001, 0x6b, 0, PutAll }, - { "RTS", 0x0000001, 0x60, 0, PutRTS }, - { "SBC", 0x0b8f6fc, 0xe0, 0, PutAll }, - { "SEC", 0x0000001, 0x38, 0, PutAll }, - { "SED", 0x0000001, 0xf8, 0, PutAll }, - { "SEI", 0x0000001, 0x78, 0, PutAll }, - { "SEP", 0x0800000, 0xe2, 1, PutSEP }, - { "STA", 0x018f6fc, 0x80, 0, PutAll }, - { "STP", 0x0000001, 0xdb, 0, PutAll }, - { "STX", 0x000010c, 0x82, 1, PutAll }, - { "STY", 0x000002c, 0x80, 1, PutAll }, - { "STZ", 0x000006c, 0x04, 5, PutAll }, - { "SWA", 0x0000001, 0xeb, 0, PutAll }, /* == XBA */ - { "TAD", 0x0000001, 0x5b, 0, PutAll }, /* == TCD */ - { "TAS", 0x0000001, 0x1b, 0, PutAll }, /* == TCS */ - { "TAX", 0x0000001, 0xaa, 0, PutAll }, - { "TAY", 0x0000001, 0xa8, 0, PutAll }, - { "TCD", 0x0000001, 0x5b, 0, PutAll }, - { "TCS", 0x0000001, 0x1b, 0, PutAll }, - { "TDA", 0x0000001, 0x7b, 0, PutAll }, /* == TDC */ - { "TDC", 0x0000001, 0x7b, 0, PutAll }, - { "TRB", 0x000000c, 0x10, 1, PutAll }, - { "TSA", 0x0000001, 0x3b, 0, PutAll }, /* == TSC */ - { "TSB", 0x000000c, 0x00, 1, PutAll }, - { "TSC", 0x0000001, 0x3b, 0, PutAll }, - { "TSX", 0x0000001, 0xba, 0, PutAll }, - { "TXA", 0x0000001, 0x8a, 0, PutAll }, - { "TXS", 0x0000001, 0x9a, 0, PutAll }, - { "TXY", 0x0000001, 0x9b, 0, PutAll }, - { "TYA", 0x0000001, 0x98, 0, PutAll }, - { "TYX", 0x0000001, 0xbb, 0, PutAll }, - { "WAI", 0x0000001, 0xcb, 0, PutAll }, - { "XBA", 0x0000001, 0xeb, 0, PutAll }, - { "XCE", 0x0000001, 0xfb, 0, PutAll } + { "ADC", 0x0b8f6fc, 0x60, 0, PutAll }, + { "AND", 0x0b8f6fc, 0x20, 0, PutAll }, + { "ASL", 0x000006e, 0x02, 1, PutAll }, + { "BCC", 0x0020000, 0x90, 0, PutPCRel8 }, + { "BCS", 0x0020000, 0xb0, 0, PutPCRel8 }, + { "BEQ", 0x0020000, 0xf0, 0, PutPCRel8 }, + { "BIT", 0x0a0006c, 0x00, 2, PutAll }, + { "BMI", 0x0020000, 0x30, 0, PutPCRel8 }, + { "BNE", 0x0020000, 0xd0, 0, PutPCRel8 }, + { "BPL", 0x0020000, 0x10, 0, PutPCRel8 }, + { "BRA", 0x0020000, 0x80, 0, PutPCRel8 }, + { "BRK", 0x0000005, 0x00, 6, PutAll }, + { "BRL", 0x0040000, 0x82, 0, PutPCRel16 }, + { "BVC", 0x0020000, 0x50, 0, PutPCRel8 }, + { "BVS", 0x0020000, 0x70, 0, PutPCRel8 }, + { "CLC", 0x0000001, 0x18, 0, PutAll }, + { "CLD", 0x0000001, 0xd8, 0, PutAll }, + { "CLI", 0x0000001, 0x58, 0, PutAll }, + { "CLV", 0x0000001, 0xb8, 0, PutAll }, + { "CMP", 0x0b8f6fc, 0xc0, 0, PutAll }, + { "COP", 0x0000004, 0x02, 6, PutAll }, + { "CPA", 0x0b8f6fc, 0xc0, 0, PutAll }, /* == CMP */ + { "CPX", 0x0c0000c, 0xe0, 1, PutAll }, + { "CPY", 0x0c0000c, 0xc0, 1, PutAll }, + { "DEA", 0x0000001, 0x00, 3, PutAll }, /* == DEC */ + { "DEC", 0x000006F, 0x00, 3, PutAll }, + { "DEX", 0x0000001, 0xca, 0, PutAll }, + { "DEY", 0x0000001, 0x88, 0, PutAll }, + { "EOR", 0x0b8f6fc, 0x40, 0, PutAll }, + { "INA", 0x0000001, 0x00, 4, PutAll }, /* == INC */ + { "INC", 0x000006F, 0x00, 4, PutAll }, + { "INX", 0x0000001, 0xe8, 0, PutAll }, + { "INY", 0x0000001, 0xc8, 0, PutAll }, + { "JML", 0x4000010, 0x5c, 1, PutAll }, + { "JMP", 0x4010818, 0x4c, 6, PutAll }, + { "JSL", 0x0000010, 0x20, 7, PutAll }, + { "JSR", 0x0010018, 0x20, 7, PutAll }, + { "LDA", 0x0b8f6fc, 0xa0, 0, PutAll }, + { "LDX", 0x0c0030c, 0xa2, 1, PutAll }, + { "LDY", 0x0c0006c, 0xa0, 1, PutAll }, + { "LSR", 0x000006F, 0x42, 1, PutAll }, + { "MVN", 0x1000000, 0x54, 0, PutBlockMove }, + { "MVP", 0x1000000, 0x44, 0, PutBlockMove }, + { "NOP", 0x0000001, 0xea, 0, PutAll }, + { "ORA", 0x0b8f6fc, 0x00, 0, PutAll }, + { "PEA", 0x0000008, 0xf4, 6, PutAll }, + { "PEI", 0x0000400, 0xd4, 1, PutAll }, + { "PER", 0x0040000, 0x62, 0, PutPCRel16 }, + { "PHA", 0x0000001, 0x48, 0, PutAll }, + { "PHB", 0x0000001, 0x8b, 0, PutAll }, + { "PHD", 0x0000001, 0x0b, 0, PutAll }, + { "PHK", 0x0000001, 0x4b, 0, PutAll }, + { "PHP", 0x0000001, 0x08, 0, PutAll }, + { "PHX", 0x0000001, 0xda, 0, PutAll }, + { "PHY", 0x0000001, 0x5a, 0, PutAll }, + { "PLA", 0x0000001, 0x68, 0, PutAll }, + { "PLB", 0x0000001, 0xab, 0, PutAll }, + { "PLD", 0x0000001, 0x2b, 0, PutAll }, + { "PLP", 0x0000001, 0x28, 0, PutAll }, + { "PLX", 0x0000001, 0xfa, 0, PutAll }, + { "PLY", 0x0000001, 0x7a, 0, PutAll }, + { "REP", 0x0800000, 0xc2, 1, PutREP }, + { "ROL", 0x000006F, 0x22, 1, PutAll }, + { "ROR", 0x000006F, 0x62, 1, PutAll }, + { "RTI", 0x0000001, 0x40, 0, PutAll }, + { "RTL", 0x0000001, 0x6b, 0, PutAll }, + { "RTS", 0x0000001, 0x60, 0, PutRTS }, + { "SBC", 0x0b8f6fc, 0xe0, 0, PutAll }, + { "SEC", 0x0000001, 0x38, 0, PutAll }, + { "SED", 0x0000001, 0xf8, 0, PutAll }, + { "SEI", 0x0000001, 0x78, 0, PutAll }, + { "SEP", 0x0800000, 0xe2, 1, PutSEP }, + { "STA", 0x018f6fc, 0x80, 0, PutAll }, + { "STP", 0x0000001, 0xdb, 0, PutAll }, + { "STX", 0x000010c, 0x82, 1, PutAll }, + { "STY", 0x000002c, 0x80, 1, PutAll }, + { "STZ", 0x000006c, 0x04, 5, PutAll }, + { "SWA", 0x0000001, 0xeb, 0, PutAll }, /* == XBA */ + { "TAD", 0x0000001, 0x5b, 0, PutAll }, /* == TCD */ + { "TAS", 0x0000001, 0x1b, 0, PutAll }, /* == TCS */ + { "TAX", 0x0000001, 0xaa, 0, PutAll }, + { "TAY", 0x0000001, 0xa8, 0, PutAll }, + { "TCD", 0x0000001, 0x5b, 0, PutAll }, + { "TCS", 0x0000001, 0x1b, 0, PutAll }, + { "TDA", 0x0000001, 0x7b, 0, PutAll }, /* == TDC */ + { "TDC", 0x0000001, 0x7b, 0, PutAll }, + { "TRB", 0x000000c, 0x10, 1, PutAll }, + { "TSA", 0x0000001, 0x3b, 0, PutAll }, /* == TSC */ + { "TSB", 0x000000c, 0x00, 1, PutAll }, + { "TSC", 0x0000001, 0x3b, 0, PutAll }, + { "TSX", 0x0000001, 0xba, 0, PutAll }, + { "TXA", 0x0000001, 0x8a, 0, PutAll }, + { "TXS", 0x0000001, 0x9a, 0, PutAll }, + { "TXY", 0x0000001, 0x9b, 0, PutAll }, + { "TYA", 0x0000001, 0x98, 0, PutAll }, + { "TYX", 0x0000001, 0xbb, 0, PutAll }, + { "WAI", 0x0000001, 0xcb, 0, PutAll }, + { "WDM", 0x0000004, 0x42, 6, PutAll }, + { "XBA", 0x0000001, 0xeb, 0, PutAll }, + { "XCE", 0x0000001, 0xfb, 0, PutAll } } }; -#ifdef SUNPLUS -/* Table for the SUNPLUS CPU */ -#include "sunplus.inc" -#endif - /* Instruction table for the SWEET16 pseudo CPU */ static const struct { unsigned Count; - InsDesc Ins[27]; + InsDesc Ins[26]; } InsTabSweet16 = { sizeof (InsTabSweet16.Ins) / sizeof (InsTabSweet16.Ins[0]), { @@ -607,7 +759,7 @@ static const struct { { "BNZ", AMSW16_BRA, 0x07, 0, PutSweet16Branch }, { "BP", AMSW16_BRA, 0x04, 0, PutSweet16Branch }, { "BR", AMSW16_BRA, 0x01, 0, PutSweet16Branch }, - { "BS", AMSW16_BRA, 0x0B, 0, PutSweet16Branch }, + { "BS", AMSW16_BRA, 0x0C, 0, PutSweet16Branch }, { "BZ", AMSW16_BRA, 0x06, 0, PutSweet16Branch }, { "CPR", AMSW16_REG, 0xD0, 0, PutSweet16 }, { "DCR", AMSW16_REG, 0xF0, 0, PutSweet16 }, @@ -633,9 +785,9 @@ static const struct { } InsTabHuC6280 = { sizeof (InsTabHuC6280.Ins) / sizeof (InsTabHuC6280.Ins[0]), { - { "ADC", 0x080A66C, 0x60, 0, PutAll }, - { "AND", 0x080A66C, 0x20, 0, PutAll }, - { "ASL", 0x000006e, 0x02, 1, PutAll }, + { "ADC", 0x080A66C, 0x60, 0, PutAll }, + { "AND", 0x080A66C, 0x20, 0, PutAll }, + { "ASL", 0x000006e, 0x02, 1, PutAll }, { "BBR0", 0x0000000, 0x0F, 0, PutBitBranch }, { "BBR1", 0x0000000, 0x1F, 0, PutBitBranch }, { "BBR2", 0x0000000, 0x2F, 0, PutBitBranch }, @@ -652,122 +804,122 @@ static const struct { { "BBS5", 0x0000000, 0xDF, 0, PutBitBranch }, { "BBS6", 0x0000000, 0xEF, 0, PutBitBranch }, { "BBS7", 0x0000000, 0xFF, 0, PutBitBranch }, - { "BCC", 0x0020000, 0x90, 0, PutPCRel8 }, - { "BCS", 0x0020000, 0xb0, 0, PutPCRel8 }, - { "BEQ", 0x0020000, 0xf0, 0, PutPCRel8 }, - { "BIT", 0x0A0006C, 0x00, 2, PutAll }, - { "BMI", 0x0020000, 0x30, 0, PutPCRel8 }, - { "BNE", 0x0020000, 0xd0, 0, PutPCRel8 }, - { "BPL", 0x0020000, 0x10, 0, PutPCRel8 }, - { "BRA", 0x0020000, 0x80, 0, PutPCRel8 }, - { "BRK", 0x0000001, 0x00, 0, PutAll }, - { "BSR", 0x0020000, 0x44, 0, PutPCRel8 }, - { "BVC", 0x0020000, 0x50, 0, PutPCRel8 }, - { "BVS", 0x0020000, 0x70, 0, PutPCRel8 }, - { "CLA", 0x0000001, 0x62, 0, PutAll }, - { "CLC", 0x0000001, 0x18, 0, PutAll }, - { "CLD", 0x0000001, 0xd8, 0, PutAll }, - { "CLI", 0x0000001, 0x58, 0, PutAll }, - { "CLV", 0x0000001, 0xb8, 0, PutAll }, - { "CLX", 0x0000001, 0x82, 0, PutAll }, - { "CLY", 0x0000001, 0xc2, 0, PutAll }, - { "CMP", 0x080A66C, 0xc0, 0, PutAll }, - { "CPX", 0x080000C, 0xe0, 1, PutAll }, - { "CPY", 0x080000C, 0xc0, 1, PutAll }, - { "CSH", 0x0000001, 0xd4, 0, PutAll }, - { "CSL", 0x0000001, 0x54, 0, PutAll }, - { "DEA", 0x0000001, 0x00, 3, PutAll }, /* == DEC */ - { "DEC", 0x000006F, 0x00, 3, PutAll }, - { "DEX", 0x0000001, 0xca, 0, PutAll }, - { "DEY", 0x0000001, 0x88, 0, PutAll }, - { "EOR", 0x080A66C, 0x40, 0, PutAll }, - { "INA", 0x0000001, 0x00, 4, PutAll }, /* == INC */ - { "INC", 0x000006f, 0x00, 4, PutAll }, - { "INX", 0x0000001, 0xe8, 0, PutAll }, - { "INY", 0x0000001, 0xc8, 0, PutAll }, - { "JMP", 0x0010808, 0x4c, 6, PutAll }, - { "JSR", 0x0000008, 0x20, 7, PutAll }, - { "LDA", 0x080A66C, 0xa0, 0, PutAll }, - { "LDX", 0x080030C, 0xa2, 1, PutAll }, - { "LDY", 0x080006C, 0xa0, 1, PutAll }, - { "LSR", 0x000006F, 0x42, 1, PutAll }, - { "NOP", 0x0000001, 0xea, 0, PutAll }, - { "ORA", 0x080A66C, 0x00, 0, PutAll }, - { "PHA", 0x0000001, 0x48, 0, PutAll }, - { "PHP", 0x0000001, 0x08, 0, PutAll }, - { "PHX", 0x0000001, 0xda, 0, PutAll }, - { "PHY", 0x0000001, 0x5a, 0, PutAll }, - { "PLA", 0x0000001, 0x68, 0, PutAll }, - { "PLP", 0x0000001, 0x28, 0, PutAll }, - { "PLX", 0x0000001, 0xfa, 0, PutAll }, - { "PLY", 0x0000001, 0x7a, 0, PutAll }, - { "RMB0", 0x0000004, 0x07, 1, PutAll }, - { "RMB1", 0x0000004, 0x17, 1, PutAll }, - { "RMB2", 0x0000004, 0x27, 1, PutAll }, - { "RMB3", 0x0000004, 0x37, 1, PutAll }, - { "RMB4", 0x0000004, 0x47, 1, PutAll }, - { "RMB5", 0x0000004, 0x57, 1, PutAll }, - { "RMB6", 0x0000004, 0x67, 1, PutAll }, - { "RMB7", 0x0000004, 0x77, 1, PutAll }, - { "ROL", 0x000006F, 0x22, 1, PutAll }, - { "ROR", 0x000006F, 0x62, 1, PutAll }, - { "RTI", 0x0000001, 0x40, 0, PutAll }, - { "RTS", 0x0000001, 0x60, 0, PutAll }, - { "SBC", 0x080A66C, 0xe0, 0, PutAll }, - { "SAX", 0x0000001, 0x22, 0, PutAll }, - { "SAY", 0x0000001, 0x42, 0, PutAll }, - { "SEC", 0x0000001, 0x38, 0, PutAll }, - { "SED", 0x0000001, 0xf8, 0, PutAll }, - { "SEI", 0x0000001, 0x78, 0, PutAll }, - { "SET", 0x0000001, 0xf4, 0, PutAll }, - { "SMB0", 0x0000004, 0x87, 1, PutAll }, - { "SMB1", 0x0000004, 0x97, 1, PutAll }, - { "SMB2", 0x0000004, 0xA7, 1, PutAll }, - { "SMB3", 0x0000004, 0xB7, 1, PutAll }, - { "SMB4", 0x0000004, 0xC7, 1, PutAll }, - { "SMB5", 0x0000004, 0xD7, 1, PutAll }, - { "SMB6", 0x0000004, 0xE7, 1, PutAll }, - { "SMB7", 0x0000004, 0xF7, 1, PutAll }, - { "ST0", 0x0800000, 0x03, 1, PutAll }, - { "ST1", 0x0800000, 0x13, 1, PutAll }, - { "ST2", 0x0800000, 0x23, 1, PutAll }, - { "STA", 0x000A66C, 0x80, 0, PutAll }, - { "STX", 0x000010c, 0x82, 1, PutAll }, - { "STY", 0x000002c, 0x80, 1, PutAll }, - { "STZ", 0x000006c, 0x04, 5, PutAll }, - { "SXY", 0x0000001, 0x02, 0, PutAll }, - { "TAI", 0x2000000, 0xf3, 0, PutBlockTransfer }, - { "TAM", 0x0800000, 0x53, 1, PutAll }, - { "TAM0", 0x0000001, 0x01, 0, PutTAMn}, - { "TAM1", 0x0000001, 0x02, 0, PutTAMn}, - { "TAM2", 0x0000001, 0x04, 0, PutTAMn}, - { "TAM3", 0x0000001, 0x08, 0, PutTAMn}, - { "TAM4", 0x0000001, 0x10, 0, PutTAMn}, - { "TAM5", 0x0000001, 0x20, 0, PutTAMn}, - { "TAM6", 0x0000001, 0x40, 0, PutTAMn}, - { "TAM7", 0x0000001, 0x80, 0, PutTAMn}, - { "TAX", 0x0000001, 0xaa, 0, PutAll }, - { "TAY", 0x0000001, 0xa8, 0, PutAll }, - { "TDD", 0x2000000, 0xc3, 0, PutBlockTransfer }, - { "TIA", 0x2000000, 0xe3, 0, PutBlockTransfer }, - { "TII", 0x2000000, 0x73, 0, PutBlockTransfer }, - { "TIN", 0x2000000, 0xD3, 0, PutBlockTransfer }, - { "TMA", 0x0800000, 0x43, 1, PutTMA }, - { "TMA0", 0x0000001, 0x01, 0, PutTMAn}, - { "TMA1", 0x0000001, 0x02, 0, PutTMAn}, - { "TMA2", 0x0000001, 0x04, 0, PutTMAn}, - { "TMA3", 0x0000001, 0x08, 0, PutTMAn}, - { "TMA4", 0x0000001, 0x10, 0, PutTMAn}, - { "TMA5", 0x0000001, 0x20, 0, PutTMAn}, - { "TMA6", 0x0000001, 0x40, 0, PutTMAn}, - { "TMA7", 0x0000001, 0x80, 0, PutTMAn}, - { "TRB", 0x000000c, 0x10, 1, PutAll }, - { "TSB", 0x000000c, 0x00, 1, PutAll }, + { "BCC", 0x0020000, 0x90, 0, PutPCRel8 }, + { "BCS", 0x0020000, 0xb0, 0, PutPCRel8 }, + { "BEQ", 0x0020000, 0xf0, 0, PutPCRel8 }, + { "BIT", 0x0A0006C, 0x00, 2, PutAll }, + { "BMI", 0x0020000, 0x30, 0, PutPCRel8 }, + { "BNE", 0x0020000, 0xd0, 0, PutPCRel8 }, + { "BPL", 0x0020000, 0x10, 0, PutPCRel8 }, + { "BRA", 0x0020000, 0x80, 0, PutPCRel8 }, + { "BRK", 0x0000001, 0x00, 0, PutAll }, + { "BSR", 0x0020000, 0x44, 0, PutPCRel8 }, + { "BVC", 0x0020000, 0x50, 0, PutPCRel8 }, + { "BVS", 0x0020000, 0x70, 0, PutPCRel8 }, + { "CLA", 0x0000001, 0x62, 0, PutAll }, + { "CLC", 0x0000001, 0x18, 0, PutAll }, + { "CLD", 0x0000001, 0xd8, 0, PutAll }, + { "CLI", 0x0000001, 0x58, 0, PutAll }, + { "CLV", 0x0000001, 0xb8, 0, PutAll }, + { "CLX", 0x0000001, 0x82, 0, PutAll }, + { "CLY", 0x0000001, 0xc2, 0, PutAll }, + { "CMP", 0x080A66C, 0xc0, 0, PutAll }, + { "CPX", 0x080000C, 0xe0, 1, PutAll }, + { "CPY", 0x080000C, 0xc0, 1, PutAll }, + { "CSH", 0x0000001, 0xd4, 0, PutAll }, + { "CSL", 0x0000001, 0x54, 0, PutAll }, + { "DEA", 0x0000001, 0x00, 3, PutAll }, /* == DEC */ + { "DEC", 0x000006F, 0x00, 3, PutAll }, + { "DEX", 0x0000001, 0xca, 0, PutAll }, + { "DEY", 0x0000001, 0x88, 0, PutAll }, + { "EOR", 0x080A66C, 0x40, 0, PutAll }, + { "INA", 0x0000001, 0x00, 4, PutAll }, /* == INC */ + { "INC", 0x000006f, 0x00, 4, PutAll }, + { "INX", 0x0000001, 0xe8, 0, PutAll }, + { "INY", 0x0000001, 0xc8, 0, PutAll }, + { "JMP", 0x0010808, 0x4c, 6, PutAll }, + { "JSR", 0x0000008, 0x20, 7, PutAll }, + { "LDA", 0x080A66C, 0xa0, 0, PutAll }, + { "LDX", 0x080030C, 0xa2, 1, PutAll }, + { "LDY", 0x080006C, 0xa0, 1, PutAll }, + { "LSR", 0x000006F, 0x42, 1, PutAll }, + { "NOP", 0x0000001, 0xea, 0, PutAll }, + { "ORA", 0x080A66C, 0x00, 0, PutAll }, + { "PHA", 0x0000001, 0x48, 0, PutAll }, + { "PHP", 0x0000001, 0x08, 0, PutAll }, + { "PHX", 0x0000001, 0xda, 0, PutAll }, + { "PHY", 0x0000001, 0x5a, 0, PutAll }, + { "PLA", 0x0000001, 0x68, 0, PutAll }, + { "PLP", 0x0000001, 0x28, 0, PutAll }, + { "PLX", 0x0000001, 0xfa, 0, PutAll }, + { "PLY", 0x0000001, 0x7a, 0, PutAll }, + { "RMB0", 0x0000004, 0x07, 1, PutAll }, + { "RMB1", 0x0000004, 0x17, 1, PutAll }, + { "RMB2", 0x0000004, 0x27, 1, PutAll }, + { "RMB3", 0x0000004, 0x37, 1, PutAll }, + { "RMB4", 0x0000004, 0x47, 1, PutAll }, + { "RMB5", 0x0000004, 0x57, 1, PutAll }, + { "RMB6", 0x0000004, 0x67, 1, PutAll }, + { "RMB7", 0x0000004, 0x77, 1, PutAll }, + { "ROL", 0x000006F, 0x22, 1, PutAll }, + { "ROR", 0x000006F, 0x62, 1, PutAll }, + { "RTI", 0x0000001, 0x40, 0, PutAll }, + { "RTS", 0x0000001, 0x60, 0, PutAll }, + { "SAX", 0x0000001, 0x22, 0, PutAll }, + { "SAY", 0x0000001, 0x42, 0, PutAll }, + { "SBC", 0x080A66C, 0xe0, 0, PutAll }, + { "SEC", 0x0000001, 0x38, 0, PutAll }, + { "SED", 0x0000001, 0xf8, 0, PutAll }, + { "SEI", 0x0000001, 0x78, 0, PutAll }, + { "SET", 0x0000001, 0xf4, 0, PutAll }, + { "SMB0", 0x0000004, 0x87, 1, PutAll }, + { "SMB1", 0x0000004, 0x97, 1, PutAll }, + { "SMB2", 0x0000004, 0xA7, 1, PutAll }, + { "SMB3", 0x0000004, 0xB7, 1, PutAll }, + { "SMB4", 0x0000004, 0xC7, 1, PutAll }, + { "SMB5", 0x0000004, 0xD7, 1, PutAll }, + { "SMB6", 0x0000004, 0xE7, 1, PutAll }, + { "SMB7", 0x0000004, 0xF7, 1, PutAll }, + { "ST0", 0x0800000, 0x03, 1, PutAll }, + { "ST1", 0x0800000, 0x13, 1, PutAll }, + { "ST2", 0x0800000, 0x23, 1, PutAll }, + { "STA", 0x000A66C, 0x80, 0, PutAll }, + { "STX", 0x000010c, 0x82, 1, PutAll }, + { "STY", 0x000002c, 0x80, 1, PutAll }, + { "STZ", 0x000006c, 0x04, 5, PutAll }, + { "SXY", 0x0000001, 0x02, 0, PutAll }, + { "TAI", 0x2000000, 0xf3, 0, PutBlockTransfer }, + { "TAM", 0x0800000, 0x53, 1, PutAll }, + { "TAM0", 0x0000001, 0x01, 0, PutTAMn}, + { "TAM1", 0x0000001, 0x02, 0, PutTAMn}, + { "TAM2", 0x0000001, 0x04, 0, PutTAMn}, + { "TAM3", 0x0000001, 0x08, 0, PutTAMn}, + { "TAM4", 0x0000001, 0x10, 0, PutTAMn}, + { "TAM5", 0x0000001, 0x20, 0, PutTAMn}, + { "TAM6", 0x0000001, 0x40, 0, PutTAMn}, + { "TAM7", 0x0000001, 0x80, 0, PutTAMn}, + { "TAX", 0x0000001, 0xaa, 0, PutAll }, + { "TAY", 0x0000001, 0xa8, 0, PutAll }, + { "TDD", 0x2000000, 0xc3, 0, PutBlockTransfer }, + { "TIA", 0x2000000, 0xe3, 0, PutBlockTransfer }, + { "TII", 0x2000000, 0x73, 0, PutBlockTransfer }, + { "TIN", 0x2000000, 0xD3, 0, PutBlockTransfer }, + { "TMA", 0x0800000, 0x43, 1, PutTMA }, + { "TMA0", 0x0000001, 0x01, 0, PutTMAn}, + { "TMA1", 0x0000001, 0x02, 0, PutTMAn}, + { "TMA2", 0x0000001, 0x04, 0, PutTMAn}, + { "TMA3", 0x0000001, 0x08, 0, PutTMAn}, + { "TMA4", 0x0000001, 0x10, 0, PutTMAn}, + { "TMA5", 0x0000001, 0x20, 0, PutTMAn}, + { "TMA6", 0x0000001, 0x40, 0, PutTMAn}, + { "TMA7", 0x0000001, 0x80, 0, PutTMAn}, + { "TRB", 0x000000c, 0x10, 1, PutAll }, + { "TSB", 0x000000c, 0x00, 1, PutAll }, { "TST", 0x000006c, 0x83, 9, PutTST }, - { "TSX", 0x0000001, 0xba, 0, PutAll }, - { "TXA", 0x0000001, 0x8a, 0, PutAll }, - { "TXS", 0x0000001, 0x9a, 0, PutAll }, - { "TYA", 0x0000001, 0x98, 0, PutAll } + { "TSX", 0x0000001, 0xba, 0, PutAll }, + { "TXA", 0x0000001, 0x8a, 0, PutAll }, + { "TXS", 0x0000001, 0x9a, 0, PutAll }, + { "TYA", 0x0000001, 0x98, 0, PutAll } } }; @@ -781,123 +933,133 @@ static const InsTable* InsTabs[CPU_COUNT] = { (const InsTable*) &InsTab65SC02, (const InsTable*) &InsTab65C02, (const InsTable*) &InsTab65816, -#ifdef SUNPLUS - (const InsTable*) &InsTabSunPlus, -#else - 0, -#endif (const InsTable*) &InsTabSweet16, (const InsTable*) &InsTabHuC6280, 0, /* Mitsubishi 740 */ + (const InsTable*) &InsTab4510, }; const InsTable* InsTab = (const InsTable*) &InsTab6502; /* Table to build the effective 65xx opcode from a base opcode and an - * addressing mode. - */ -static unsigned char EATab[10][AM65I_COUNT] = { +** addressing mode. (The value in the table is ORed with the base opcode) +*/ +static unsigned char EATab[12][AM65I_COUNT] = { { /* Table 0 */ - 0x00, 0x00, 0x05, 0x0D, 0x0F, 0x15, 0x1D, 0x1F, - 0x00, 0x19, 0x12, 0x00, 0x07, 0x11, 0x17, 0x01, - 0x00, 0x00, 0x00, 0x03, 0x13, 0x09, 0x00, 0x09, - 0x00, 0x00 + 0x00, 0x00, 0x05, 0x0D, 0x0F, 0x15, 0x1D, 0x1F, + 0x00, 0x19, 0x12, 0x00, 0x07, 0x11, 0x17, 0x01, + 0x00, 0x00, 0x00, 0x03, 0x13, 0x09, 0x00, 0x09, + 0x00, 0x00, 0x00, 0x00 }, { /* Table 1 */ - 0x08, 0x08, 0x04, 0x0C, 0x00, 0x14, 0x1C, 0x00, - 0x14, 0x1C, 0x00, 0x80, 0x00, 0x10, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00 + 0x08, 0x08, 0x04, 0x0C, 0x00, 0x14, 0x1C, 0x00, + 0x14, 0x1C, 0x00, 0x80, 0x00, 0x10, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x80, 0x00 }, { /* Table 2 */ - 0x00, 0x00, 0x24, 0x2C, 0x0F, 0x34, 0x3C, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x89, 0x00, 0x00, - 0x00, 0x00 + 0x00, 0x00, 0x24, 0x2C, 0x0F, 0x34, 0x3C, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x89, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00 }, { /* Table 3 */ - 0x3A, 0x3A, 0xC6, 0xCE, 0x00, 0xD6, 0xDE, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00 + 0x3A, 0x3A, 0xC6, 0xCE, 0x00, 0xD6, 0xDE, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00 }, { /* Table 4 */ - 0x1A, 0x1A, 0xE6, 0xEE, 0x00, 0xF6, 0xFE, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00 + 0x1A, 0x1A, 0xE6, 0xEE, 0x00, 0xF6, 0xFE, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00 }, { /* Table 5 */ - 0x00, 0x00, 0x60, 0x98, 0x00, 0x70, 0x9E, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00 + 0x00, 0x00, 0x60, 0x98, 0x00, 0x70, 0x9E, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00 }, { /* Table 6 */ - 0x00, 0x00, 0x00, 0x00, 0x10, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x20, 0x00, 0x00, 0x00, 0x00, - 0x30, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00 + 0x00, 0x00, 0x00, 0x00, 0x10, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x20, 0x00, 0x00, 0x00, 0x00, + 0x30, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x90, 0x00 }, - { /* Table 7 */ - 0x00, 0x00, 0x00, 0x00, 0x02, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0xDC, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00 + { /* Table 7 (Subroutine opcodes) */ + 0x00, 0x00, 0x00, 0x00, 0x02, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x02, 0x00, 0x00, 0x00, 0x00, + 0xDC, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00 }, { /* Table 8 */ - 0x00, 0x40, 0x01, 0x41, 0x00, 0x09, 0x49, 0x00, - 0x00, 0x00, 0x00, 0x51, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x40, 0x00, 0x00, - 0x00, 0x00 + 0x00, 0x40, 0x01, 0x41, 0x00, 0x09, 0x49, 0x00, + 0x00, 0x00, 0x00, 0x51, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x40, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00 }, { /* Table 9 */ - 0x00, 0x00, 0x00, 0x10, 0x00, 0x20, 0x30, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00 + 0x00, 0x00, 0x00, 0x10, 0x00, 0x20, 0x30, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00 + }, + { /* Table 10 (NOPs) */ + 0xea, 0x00, 0x04, 0x0c, 0x00, 0x14, 0x1c, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x80, + 0x00, 0x00, 0x00, 0x00 + }, + { /* Table 11 (LAX) */ + 0x08, 0x08, 0x04, 0x0C, 0x00, 0x14, 0x1C, 0x00, + 0x14, 0x1C, 0x00, 0x80, 0x00, 0x10, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x08, + 0x00, 0x00, 0x80, 0x00 }, }; /* Table to build the effective SWEET16 opcode from a base opcode and an - * addressing mode. - */ +** addressing mode. +*/ static unsigned char Sweet16EATab[2][AMSW16I_COUNT] = { { /* Table 0 */ - 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, }, { /* Table 1 */ - 0x00, 0x00, 0x00, 0x40, 0x20, + 0x00, 0x00, 0x00, 0x40, 0x20, }, }; /* Table that encodes the additional bytes for each 65xx instruction */ unsigned char ExtBytes[AM65I_COUNT] = { - 0, /* Implicit */ - 0, /* Accu */ - 1, /* Direct */ - 2, /* Absolute */ - 3, /* Absolute long */ - 1, /* Direct,X */ - 2, /* Absolute,X */ - 3, /* Absolute long,X */ - 1, /* Direct,Y */ - 2, /* Absolute,Y */ - 1, /* (Direct) */ - 2, /* (Absolute) */ - 1, /* [Direct] */ - 1, /* (Direct),Y */ - 1, /* [Direct],Y */ - 1, /* (Direct,X) */ - 2, /* (Absolute,X) */ - 1, /* Relative short */ - 2, /* Relative long */ - 1, /* r,s */ - 1, /* (r,s),y */ - 1, /* Immidiate accu */ - 1, /* Immidiate index */ - 1, /* Immidiate byte */ - 2, /* Blockmove (65816) */ - 7, /* Block transfer (HuC6280) */ + 0, /* Implicit */ + 0, /* Accu */ + 1, /* Direct */ + 2, /* Absolute */ + 3, /* Absolute long */ + 1, /* Direct,X */ + 2, /* Absolute,X */ + 3, /* Absolute long,X */ + 1, /* Direct,Y */ + 2, /* Absolute,Y */ + 1, /* (Direct) */ + 2, /* (Absolute) */ + 1, /* [Direct] */ + 1, /* (Direct),Y */ + 1, /* [Direct],Y */ + 1, /* (Direct,X) */ + 2, /* (Absolute,X) */ + 1, /* Relative short */ + 2, /* Relative long */ + 1, /* r,s */ + 1, /* (r,s),y */ + 1, /* Immidiate accu */ + 1, /* Immidiate index */ + 1, /* Immidiate byte */ + 2, /* Blockmove (65816) */ + 7, /* Block transfer (HuC6280) */ + 2, /* Absolute Indirect long */ + 2, /* Immidiate word */ }; /* Table that encodes the additional bytes for each SWEET16 instruction */ @@ -919,21 +1081,21 @@ static unsigned char Sweet16ExtBytes[AMSW16I_COUNT] = { static int EvalEA (const InsDesc* Ins, EffAddr* A) /* Evaluate the effective address. All fields in A will be valid after calling - * this function. The function returns true on success and false on errors. - */ +** this function. The function returns true on success and false on errors. +*/ { /* Get the set of possible addressing modes */ GetEA (A); /* From the possible addressing modes, remove the ones that are invalid - * for this instruction or CPU. - */ + ** for this instruction or CPU. + */ A->AddrModeSet &= Ins->AddrMode; /* If we have an expression, check it and remove any addressing modes that - * are too small for the expression size. Since we have to study the - * expression anyway, do also replace it by a simpler one if possible. - */ + ** are too small for the expression size. Since we have to study the + ** expression anyway, do also replace it by a simpler one if possible. + */ if (A->Expr) { ExprDesc ED; ED_Init (&ED); @@ -945,17 +1107,29 @@ static int EvalEA (const InsDesc* Ins, EffAddr* A) A->Expr = SimplifyExpr (A->Expr, &ED); if (ED.AddrSize == ADDR_SIZE_DEFAULT) { - /* If we don't know how big the expression is, assume the - * default address size for data. If this default address - * size is unequal to zero page addressing, but zero page - * addressing is allowed by the instruction, mark all symbols - * in the expression tree. This mark will be checked at end - * of assembly, and a warning is issued, if a zero page symbol - * was guessed wrong here. - */ - ED.AddrSize = DataAddrSize; - if (ED.AddrSize > ADDR_SIZE_ZP && (A->AddrModeSet & AM65_SET_ZP)) { - ExprGuessedAddrSize (A->Expr, ADDR_SIZE_ZP); + /* We don't know how big the expression is. If the instruction + ** allows just one addressing mode, assume this as address size + ** for the expression. Otherwise assume the default address size + ** for data. + */ + if ((A->AddrModeSet & ~AM65_ALL_ZP) == 0) { + ED.AddrSize = ADDR_SIZE_ZP; + } else if ((A->AddrModeSet & ~AM65_ALL_ABS) == 0) { + ED.AddrSize = ADDR_SIZE_ABS; + } else if ((A->AddrModeSet & ~AM65_ALL_FAR) == 0) { + ED.AddrSize = ADDR_SIZE_FAR; + } else { + ED.AddrSize = DataAddrSize; + /* If the default address size of the data segment is unequal + ** to zero page addressing, but zero page addressing is + ** allowed by the instruction, mark all symbols in the + ** expression tree. This mark will be checked at end of + ** assembly, and a warning is issued, if a zero page symbol + ** was guessed wrong here. + */ + if (ED.AddrSize > ADDR_SIZE_ZP && (A->AddrModeSet & AM65_SET_ZP)) { + ExprGuessedAddrSize (A->Expr, ADDR_SIZE_ZP); + } } } @@ -977,19 +1151,19 @@ static int EvalEA (const InsDesc* Ins, EffAddr* A) /* Check if we have any adressing modes left */ if (A->AddrModeSet == 0) { - Error ("Illegal addressing mode"); - return 0; + Error ("Illegal addressing mode"); + return 0; } A->AddrMode = BitFind (A->AddrModeSet); A->AddrModeBit = (0x01UL << A->AddrMode); /* If the instruction has a one byte operand and immediate addressing is - * allowed but not used, check for an operand expression in the form - *