X-Git-Url: https://git.sur5r.net/?a=blobdiff_plain;f=src%2Fcc65%2Fcodeent.c;h=3868a353103f7e0b14d80dac9f66ba7441019a1f;hb=3f4096d3030095605f28b4cfa73563c53a563df6;hp=427a17ef1e74acd9b05429d98feec88f91142ebf;hpb=5a656ef6df05e96ea533e6e25183dd3b9df55066;p=cc65

diff --git a/src/cc65/codeent.c b/src/cc65/codeent.c
index 427a17ef1..3868a3531 100644
--- a/src/cc65/codeent.c
+++ b/src/cc65/codeent.c
@@ -245,8 +245,8 @@ CodeEntry* NewCodeEntry (opc_t OPC, am_t AM, const char* Arg,
     E->OPC    = D->OPC;
     E->AM     = AM;
     E->Size   = GetInsnSize (E->OPC, E->AM);
-    E->Flags  = NumArg (E->Arg, &E->Num)? CEF_NUMARG : 0;
     E->Arg    = GetArgCopy (Arg);
+    E->Flags  = NumArg (E->Arg, &E->Num)? CEF_NUMARG : 0;   /* Needs E->Arg */
     E->Info   = D->Info;
     E->JumpTo = JumpTo;
     E->LI     = UseLineInfo (LI);
@@ -427,19 +427,6 @@ void CE_FreeRegInfo (CodeEntry* E)
 
 
 
-#if 0   /* Used for debugging */
-static void DumpRegInfo (const char* Desc, const RegInfo* RI)
-{
-    fprintf (stdout, "%s:\n", Desc);
-    fprintf (stdout, "In:  ");
-    RC_Dump (stdout, &RI->In);
-    fprintf (stdout, "Out: ");
-    RC_Dump (stdout, &RI->Out);
-}
-#endif
-
-
-
 void CE_GenRegInfo (CodeEntry* E, RegContents* InputRegs)
 /* Generate register info for this instruction. If an old info exists, it is
  * overwritten.
@@ -510,7 +497,7 @@ void CE_GenRegInfo (CodeEntry* E, RegContents* InputRegs)
 	    break;
 
 	case OP65_ASL:
-	    if (E->AM == AM65_ACC && In->RegA >= 0) {
+	    if (E->AM == AM65_ACC && RegValIsKnown (In->RegA)) {
 		Out->RegA = (In->RegA << 1) & 0xFF;
 	    } else if (E->AM == AM65_ZP) {
 		switch (GetKnownReg (E->Chg & REG_ZP, In)) {
@@ -597,7 +584,7 @@ void CE_GenRegInfo (CodeEntry* E, RegContents* InputRegs)
 	    break;
 
 	case OP65_DEC:
-	    if (E->AM == AM65_ACC && In->RegA >= 0) {
+	    if (E->AM == AM65_ACC && RegValIsKnown (In->RegA)) {
 	    	Out->RegA = (In->RegA - 1) & 0xFF;
 	    } else if (E->AM == AM65_ZP) {
 		switch (GetKnownReg (E->Chg & REG_ZP, In)) {
@@ -673,7 +660,7 @@ void CE_GenRegInfo (CodeEntry* E, RegContents* InputRegs)
 	    break;
 
 	case OP65_INC:
-	    if (E->AM == AM65_ACC && In->RegA >= 0) {
+	    if (E->AM == AM65_ACC && RegValIsKnown (In->RegA)) {
 	     	Out->RegA = (In->RegA + 1) & 0xFF;
 	    } else if (E->AM == AM65_ZP) {
 	     	switch (GetKnownReg (E->Chg & REG_ZP, In)) {
@@ -876,7 +863,7 @@ void CE_GenRegInfo (CodeEntry* E, RegContents* InputRegs)
 	    break;
 
 	case OP65_LSR:
-	    if (E->AM == AM65_ACC && In->RegA >= 0) {
+	    if (E->AM == AM65_ACC && RegValIsKnown (In->RegA)) {
 		Out->RegA = (In->RegA >> 1) & 0xFF;
 	    } else if (E->AM == AM65_ZP) {
 		switch (GetKnownReg (E->Chg & REG_ZP, In)) {
@@ -1153,7 +1140,7 @@ void CE_GenRegInfo (CodeEntry* E, RegContents* InputRegs)
 	     	/* Invalidates all ZP registers */
 	    	RC_InvalidateZP (Out);
 	    } else if (E->AM == AM65_ZP) {
-	    	if (In->RegA >= 0) {
+	    	if (RegValIsKnown (In->RegA)) {
 		    switch (GetKnownReg (E->Chg & REG_ZP, In)) {
 			case REG_TMP1:
 			    Out->Tmp1 &= ~In->RegA;
@@ -1198,7 +1185,7 @@ void CE_GenRegInfo (CodeEntry* E, RegContents* InputRegs)
 	     	/* Invalidates all ZP registers */
 	    	RC_InvalidateZP (Out);
 	    } else if (E->AM == AM65_ZP) {
-	    	if (In->RegA >= 0) {
+	    	if (RegValIsKnown (In->RegA)) {
 		    switch (GetKnownReg (E->Chg & REG_ZP, In)) {
 			case REG_TMP1:
 			    Out->Tmp1 |= In->RegA;