X-Git-Url: https://git.sur5r.net/?a=blobdiff_plain;f=src%2Fcc65%2Fcoptind.h;h=0ea7cd1b93bd722a4dd1bcdfa471d7ef2628aaf8;hb=77bfcc1ff0a88e0430f077d22b6fad07c7d0c86b;hp=bcb9e5a40d2f878ccc3294257db23b52fd8d9d66;hpb=c9cb564b9bf5e91cef70cc7941f8f3465f0abc70;p=cc65

diff --git a/src/cc65/coptind.h b/src/cc65/coptind.h
index bcb9e5a40..0ea7cd1b9 100644
--- a/src/cc65/coptind.h
+++ b/src/cc65/coptind.h
@@ -6,10 +6,10 @@
 /*                                                                           */
 /*                                                                           */
 /*                                                                           */
-/* (C) 2001      Ullrich von Bassewitz                                       */
-/*               Wacholderweg 14                                             */
-/*               D-70597 Stuttgart                                           */
-/* EMail:        uz@cc65.org                                                 */
+/* (C) 2001-2009, Ullrich von Bassewitz                                      */
+/*                Roemerstrasse 52                                           */
+/*                D-70794 Filderstadt                                        */
+/* EMail:         uz@cc65.org                                                */
 /*                                                                           */
 /*                                                                           */
 /* This software is provided 'as-is', without any expressed or implied       */
@@ -38,16 +38,23 @@
 
 
 
+/* cc65 */
 #include "codeseg.h"
 
 
 
 /*****************************************************************************/
-/*		    		     Code				     */
+/*	  	    		     Code				     */
 /*****************************************************************************/
 
 
 
+unsigned OptRTSJumps1 (CodeSeg* S);
+/* Replace jumps to RTS by RTS */
+
+unsigned OptRTSJumps2 (CodeSeg* S);
+/* Replace long conditional jumps to RTS */
+
 unsigned OptDeadJumps (CodeSeg* S);
 /* Remove dead jumps (jumps to the next instruction) */
 
@@ -70,19 +77,100 @@ unsigned OptRTS (CodeSeg* S);
  * label, the dead code elimination should take care of it.
  */
 
-unsigned OptJumpTarget (CodeSeg* S);
+unsigned OptJumpTarget1 (CodeSeg* S);
 /* If the instruction preceeding an unconditional branch is the same as the
  * instruction preceeding the jump target, the jump target may be moved
  * one entry back. This is a size optimization, since the instruction before
  * the branch gets removed.
  */
 
-unsigned OptDeadCondBranches (CodeSeg* S);
+unsigned OptJumpTarget2 (CodeSeg* S);
+/* If a bcs jumps to a sec insn or a bcc jumps to clc, skip this insn, since
+ * it's job is already done.
+ */
+
+unsigned OptJumpTarget3 (CodeSeg* S);
+/* Jumps to load instructions of a register, that do already have the matching
+ * register contents may skip the load instruction, since it's job is already
+ * done.
+ */
+
+unsigned OptCondBranches1 (CodeSeg* S);
 /* If an immidiate load of a register is followed by a conditional jump that
  * is never taken because the load of the register sets the flags in such a
  * manner, remove the conditional branch.
  */
 
+unsigned OptCondBranches2 (CodeSeg* S);
+/* If on entry to a "rol a" instruction the accu is zero, and a beq/bne follows,
+ * we can remove the rol and branch on the state of the carry.
+ */
+
+unsigned OptUnusedLoads (CodeSeg* S);
+/* Remove loads of registers where the value loaded is not used later. */
+
+unsigned OptUnusedStores (CodeSeg* S);
+/* Remove stores into zero page registers that aren't used later */
+
+unsigned OptDupLoads (CodeSeg* S);
+/* Remove loads of registers where the value loaded is already in the register. */
+
+unsigned OptStoreLoad (CodeSeg* S);
+/* Remove a store followed by a load from the same location. */
+
+unsigned OptTransfers1 (CodeSeg* S);
+/* Remove transfers from one register to another and back */
+
+unsigned OptTransfers2 (CodeSeg* S);
+/* Replace loads followed by a register transfer by a load with the second
+ * register if possible.
+ */
+
+unsigned OptTransfers3 (CodeSeg* S);
+/* Replace a register transfer followed by a store of the second register by a
+ * store of the first register if this is possible.
+ */
+
+unsigned OptTransfers4 (CodeSeg* S);
+/* Replace a load of a register followed by a transfer insn of the same register
+ * by a load of the second register if possible.
+ */
+
+unsigned OptPushPop (CodeSeg* S);
+/* Remove a PHA/PLA sequence were A is not used later */
+
+unsigned OptPrecalc (CodeSeg* S);
+/* Replace immediate operations with the accu where the current contents are
+ * known by a load of the final value.
+ */
+
+unsigned OptBranchDist (CodeSeg* S);
+/* Change branches for the distance needed. */
+
+unsigned OptIndLoads1 (CodeSeg* S);
+/* Change
+ *
+ *     lda      (zp),y
+ *
+ * into
+ *
+ *     lda      (zp,x)
+ *
+ * provided that x and y are both zero.
+ */
+
+unsigned OptIndLoads2 (CodeSeg* S);
+/* Change
+ *
+ *     lda      (zp,x)
+ *
+ * into
+ *
+ *     lda      (zp),y
+ *
+ * provided that x and y are both zero.
+ */
+
 
 
 /* End of coptind.h */