X-Git-Url: https://git.sur5r.net/?a=blobdiff_plain;f=src%2Fcc65%2Fcoptind.h;h=0ea7cd1b93bd722a4dd1bcdfa471d7ef2628aaf8;hb=77bfcc1ff0a88e0430f077d22b6fad07c7d0c86b;hp=eb22301e10d12de8952a95720d732a93043c6fdc;hpb=1b2e0f66ccf80d18f1b87df056a6fcd443150b28;p=cc65

diff --git a/src/cc65/coptind.h b/src/cc65/coptind.h
index eb22301e1..0ea7cd1b9 100644
--- a/src/cc65/coptind.h
+++ b/src/cc65/coptind.h
@@ -89,6 +89,12 @@ unsigned OptJumpTarget2 (CodeSeg* S);
  * it's job is already done.
  */
 
+unsigned OptJumpTarget3 (CodeSeg* S);
+/* Jumps to load instructions of a register, that do already have the matching
+ * register contents may skip the load instruction, since it's job is already
+ * done.
+ */
+
 unsigned OptCondBranches1 (CodeSeg* S);
 /* If an immidiate load of a register is followed by a conditional jump that
  * is never taken because the load of the register sets the flags in such a
@@ -141,6 +147,30 @@ unsigned OptPrecalc (CodeSeg* S);
 unsigned OptBranchDist (CodeSeg* S);
 /* Change branches for the distance needed. */
 
+unsigned OptIndLoads1 (CodeSeg* S);
+/* Change
+ *
+ *     lda      (zp),y
+ *
+ * into
+ *
+ *     lda      (zp,x)
+ *
+ * provided that x and y are both zero.
+ */
+
+unsigned OptIndLoads2 (CodeSeg* S);
+/* Change
+ *
+ *     lda      (zp,x)
+ *
+ * into
+ *
+ *     lda      (zp),y
+ *
+ * provided that x and y are both zero.
+ */
+
 
 
 /* End of coptind.h */