X-Git-Url: https://git.sur5r.net/?a=blobdiff_plain;f=src%2Fflash%2Fpic32mx.h;h=b1c4ef2f0e6a51fec1932b197d0328021569a8b7;hb=76868e071306bc83d25b89e57b785fef4637c4c8;hp=28921f5eb9b462aeffbce5136a08f644b83d29f7;hpb=a31e738fda3f10f419c3b742685965b7ce1e9755;p=openocd

diff --git a/src/flash/pic32mx.h b/src/flash/pic32mx.h
index 28921f5e..b1c4ef2f 100644
--- a/src/flash/pic32mx.h
+++ b/src/flash/pic32mx.h
@@ -27,7 +27,6 @@
 #define PIC32MX_H
 
 #include "flash.h"
-#include "target.h"
 
 typedef struct pic32mx_flash_bank_s
 {
@@ -42,22 +41,31 @@ typedef struct pic32mx_flash_bank_s
 /* pic32mx memory locations */
 
 #define PIC32MX_KUSEG_PGM_FLASH		0x7D000000
-#define PIC32MX_KUSEG_RAM		0x7F000000
+#define PIC32MX_KUSEG_RAM			0x7F000000
 
-#define PIC32MX_KSEG0_RAM		0x80000000
+#define PIC32MX_KSEG0_RAM			0x80000000
 #define PIC32MX_KSEG0_PGM_FLASH		0x9D000000
 #define PIC32MX_KSEG0_BOOT_FLASH	0x9FC00000
 
-#define PIC32MX_KSEG1_RAM		0xA0000000
+#define PIC32MX_KSEG1_RAM			0xA0000000
 #define PIC32MX_KSEG1_PGM_FLASH		0xBD000000
 #define PIC32MX_KSEG1_PERIPHERAL	0xBF800000
 #define PIC32MX_KSEG1_BOOT_FLASH	0xBFC00000
 
-#define PIC32MX_PHYS_RAM		0x00000000
+#define PIC32MX_PHYS_RAM			0x00000000
 #define PIC32MX_PHYS_PGM_FLASH		0x1D000000
 #define PIC32MX_PHYS_PERIPHERALS	0x1F800000
 #define PIC32MX_PHYS_BOOT_FLASH		0x1FC00000
 
+/*
+ * Translate Virtual and Physical addresses.
+ * Note: These macros only work for KSEG0/KSEG1 addresses.
+ */
+#define KS1Virt2Phys(vaddr)			((vaddr)-0xA0000000)
+#define Phys2KS1Virt(paddr)			((paddr) + 0xA0000000)
+#define KS0Virt2Phys(vaddr)			((vaddr)-0x80000000)
+#define Phys2KS0Virt(paddr)			((paddr) + 0x80000000)
+
 /* pic32mx configuration register locations */
 
 #define PIC32MX_DEVCFG0		0xBFC02FFC
@@ -72,16 +80,16 @@ typedef struct pic32mx_flash_bank_s
 #define PIC32MX_NVMCONCLR	0xBF80F404
 #define PIC32MX_NVMCONSET	0xBF80F408
 #define PIC32MX_NVMCONINV	0xBF80F40C
-#define NVMCON_NVMWR		(1<<15)
-#define NVMCON_NVMWREN		(1<<14)
-#define NVMCON_NVMERR		(1<<13)
-#define NVMCON_LVDERR		(1<<12)
-#define NVMCON_LVDSTAT		(1<<11)
-#define NVMCON_OP_PFM_ERASE	0x5
+#define NVMCON_NVMWR		(1 << 15)
+#define NVMCON_NVMWREN		(1 << 14)
+#define NVMCON_NVMERR		(1 << 13)
+#define NVMCON_LVDERR		(1 << 12)
+#define NVMCON_LVDSTAT		(1 << 11)
+#define NVMCON_OP_PFM_ERASE		0x5
 #define NVMCON_OP_PAGE_ERASE	0x4
-#define NVMCON_OP_ROW_PROG	0x3
-#define NVMCON_OP_WORD_PROG	0x1
-#define NVMCON_OP_NOP		0x0
+#define NVMCON_OP_ROW_PROG		0x3
+#define NVMCON_OP_WORD_PROG		0x1
+#define NVMCON_OP_NOP			0x0
 
 #define PIC32MX_NVMKEY		0xBF80F410
 #define PIC32MX_NVMADDR		0xBF80F420
@@ -97,8 +105,8 @@ typedef struct pic32mx_flash_bank_s
 #define NVMKEY2			0x556699AA
 
 typedef struct pic32mx_mem_layout_s {
-	u32 sector_start;
-	u32 sector_size;
+	uint32_t sector_start;
+	uint32_t sector_size;
 } pic32mx_mem_layout_t;
 
 #endif /* PIC32MX_H */