X-Git-Url: https://git.sur5r.net/?a=blobdiff_plain;f=src%2Fflash%2Fs3c2412_nand.c;h=7b65f84da5409586394017eb12e15d9ccecde1a0;hb=57c5c5f46304a785092874a7dc0f6abc84794cc3;hp=271b3c40c1fdfdbcd7b488a9977e3c9f11003bd3;hpb=fbcb57baf842a84898dcc1cbe9a8b56d2a0028e1;p=openocd

diff --git a/src/flash/s3c2412_nand.c b/src/flash/s3c2412_nand.c
index 271b3c40..7b65f84d 100644
--- a/src/flash/s3c2412_nand.c
+++ b/src/flash/s3c2412_nand.c
@@ -30,52 +30,25 @@
 
 #include "s3c24xx_nand.h"
 
-
-static int s3c2412_nand_device_command(struct command_context_s *cmd_ctx, char *cmd, char **args, int argc, struct nand_device_s *device);
-static int s3c2412_init(struct nand_device_s *device);
-
-nand_flash_controller_t s3c2412_nand_controller =
-{
-	.name			= "s3c2412",
-	.nand_device_command	= s3c2412_nand_device_command,
-	.register_commands	= s3c24xx_register_commands,
-	.init			= s3c2412_init,
-	.reset			= s3c24xx_reset,
-	.command		= s3c24xx_command,
-	.address		= s3c24xx_address,
-	.write_data		= s3c24xx_write_data,
-	.read_data		= s3c24xx_read_data,
-	.write_page		= s3c24xx_write_page,
-	.read_page		= s3c24xx_read_page,
-	.write_block_data	= s3c2440_write_block_data,
-	.read_block_data	= s3c2440_read_block_data,
-	.controller_ready	= s3c24xx_controller_ready,
-	.nand_ready		= s3c2440_nand_ready,
-};
-
 static int s3c2412_nand_device_command(struct command_context_s *cmd_ctx, char *cmd,
 				char **args, int argc,
-				struct nand_device_s *device)
+				struct nand_device_s *nand)
 {
 	s3c24xx_nand_controller_t *info;
-
-	info = s3c24xx_nand_device_command(cmd_ctx, cmd, args, argc, device);
-	if (info == NULL) {
-		return ERROR_NAND_DEVICE_INVALID;
-	}
+	CALL_S3C24XX_DEVICE_COMMAND(nand, &info);
 
 	/* fill in the address fields for the core device */
 	info->cmd = S3C2440_NFCMD;
 	info->addr = S3C2440_NFADDR;
 	info->data = S3C2440_NFDATA;
 	info->nfstat = S3C2412_NFSTAT;
-	
+
 	return ERROR_OK;
 }
 
-static int s3c2412_init(struct nand_device_s *device)
+static int s3c2412_init(struct nand_device_s *nand)
 {
-	s3c24xx_nand_controller_t *s3c24xx_info = device->controller_priv;
+	s3c24xx_nand_controller_t *s3c24xx_info = nand->controller_priv;
 	target_t *target = s3c24xx_info->target;
 
 	target_write_u32(target, S3C2410_NFCONF,
@@ -89,3 +62,21 @@ static int s3c2412_init(struct nand_device_s *device)
 
 	return ERROR_OK;
 }
+
+nand_flash_controller_t s3c2412_nand_controller = {
+		.name = "s3c2412",
+		.nand_device_command = &s3c2412_nand_device_command,
+		.register_commands = &s3c24xx_register_commands,
+		.init = &s3c2412_init,
+		.reset = &s3c24xx_reset,
+		.command = &s3c24xx_command,
+		.address = &s3c24xx_address,
+		.write_data = &s3c24xx_write_data,
+		.read_data = &s3c24xx_read_data,
+		.write_page = s3c24xx_write_page,
+		.read_page = s3c24xx_read_page,
+		.write_block_data = &s3c2440_write_block_data,
+		.read_block_data = &s3c2440_read_block_data,
+		.controller_ready = &s3c24xx_controller_ready,
+		.nand_ready = &s3c2440_nand_ready,
+	};