X-Git-Url: https://git.sur5r.net/?a=blobdiff_plain;f=src%2Fflash%2Fs3c24xx_regs_nand.h;h=7d295d80829b6b277a28d4e22089c17b06561760;hb=6d3bed69dc023f49b51b6504d977463e722e9e9d;hp=d742205ac172673f57c96f99e93d4125b945e46e;hpb=0d2b289048e603fd529cfceb82b589661946bea7;p=openocd diff --git a/src/flash/s3c24xx_regs_nand.h b/src/flash/s3c24xx_regs_nand.h index d742205a..7d295d80 100644 --- a/src/flash/s3c24xx_regs_nand.h +++ b/src/flash/s3c24xx_regs_nand.h @@ -1,19 +1,30 @@ -/* linux/include/asm-arm/arch-s3c2410/regs-nand.h - * - * Copyright (c) 2004,2005 Simtec Electronics - * http://www.simtec.co.uk/products/SWLINUX/ - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 as - * published by the Free Software Foundation. - * +/*************************************************************************** + * Copyright (C) 2004, 2005 by Simtec Electronics * + * linux@simtec.co.uk * + * http://www.simtec.co.uk/products/SWLINUX/ * + * * + * This program is free software; you can redistribute it and/or modify * + * it under the terms of the GNU General Public License as published by * + * the Free Software Foundation; version 2 of the License. * + * * + * This program is distributed in the hope that it will be useful, * + * but WITHOUT ANY WARRANTY; without even the implied warranty of * + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the * + * GNU General Public License for more details. * + * * + * You should have received a copy of the GNU General Public License * + * along with this program; if not, write to the * + * Free Software Foundation, Inc., * + * 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. * + ***************************************************************************/ + +/* * S3C2410 NAND register definitions -*/ + */ #ifndef __ASM_ARM_REGS_NAND #define __ASM_ARM_REGS_NAND "$Id: nand.h,v 1.3 2003/12/09 11:36:29 ben Exp $" - #define S3C2410_NFREG(x) (x) #define S3C2410_NFCONF S3C2410_NFREG(0x00) @@ -117,7 +128,5 @@ #define S3C2412_NFECCERR_MULTIBIT (2) #define S3C2412_NFECCERR_ECCAREA (3) - - #endif /* __ASM_ARM_REGS_NAND */