X-Git-Url: https://git.sur5r.net/?a=blobdiff_plain;f=src%2Fflash%2Fstellaris.h;h=eaf3d481207ba528b8ee2ab1c24d836344f93d2a;hb=36b4ac90e45dda4df505981bd8d090971e478867;hp=317309a63cf256dbaab933e5d19cb85576cab7dc;hpb=0643263d68bcddc56eaa7e3678b7502798410711;p=openocd

diff --git a/src/flash/stellaris.h b/src/flash/stellaris.h
index 317309a6..eaf3d481 100644
--- a/src/flash/stellaris.h
+++ b/src/flash/stellaris.h
@@ -25,29 +25,33 @@
 typedef struct stellaris_flash_bank_s
 {
 	/* chip id register */
-	u32 did0;
-	u32 did1;
-	u32 dc0;
-	u32 dc1;
+	uint32_t did0;
+	uint32_t did1;
+	uint32_t dc0;
+	uint32_t dc1;
 
 	char * target_name;
 
-	u32 sramsiz;
-	u32 flshsz;
+	uint32_t sramsiz;
+	uint32_t flshsz;
 	/* flash geometry */
-	u32 num_pages;
-	u32 pagesize;
-	u32 pages_in_lockregion;
+	uint32_t num_pages;
+	uint32_t pagesize;
+	uint32_t pages_in_lockregion;
 
 	/* nv memory bits */
-	u16 num_lockbits;
-	u32 lockbits;
+	uint16_t num_lockbits;
+	uint32_t lockbits;
 
 	/* main clock status */
-	u32 rcc;
-	u8  mck_valid;
-	u32 mck_freq;
-	
+	uint32_t rcc;
+	uint32_t rcc2;
+	uint8_t  mck_valid;
+	uint8_t  xtal_mask;
+	uint32_t iosc_freq;
+	uint32_t mck_freq;
+	const char *iosc_desc;
+	const char *mck_desc;
 } stellaris_flash_bank_t;
 
 /* STELLARIS control registers */
@@ -63,18 +67,19 @@ typedef struct stellaris_flash_bank_s
 #define	RIS			0x050
 #define	RCC			0x060
 #define	PLLCFG		0x064
+#define	RCC2		0x070
 
 #define FMPRE		0x130
 #define FMPPE		0x134
-#define USECRL 		0x140
+#define USECRL		0x140
 
 #define FLASH_CONTROL_BASE	0x400FD000
-#define FLASH_FMA	(FLASH_CONTROL_BASE|0x000)
-#define FLASH_FMD	(FLASH_CONTROL_BASE|0x004)
-#define FLASH_FMC	(FLASH_CONTROL_BASE|0x008)
-#define FLASH_CRIS	(FLASH_CONTROL_BASE|0x00C)
-#define FLASH_CIM	(FLASH_CONTROL_BASE|0x010)
-#define FLASH_MISC	(FLASH_CONTROL_BASE|0x014)
+#define FLASH_FMA	(FLASH_CONTROL_BASE | 0x000)
+#define FLASH_FMD	(FLASH_CONTROL_BASE | 0x004)
+#define FLASH_FMC	(FLASH_CONTROL_BASE | 0x008)
+#define FLASH_CRIS	(FLASH_CONTROL_BASE | 0x00C)
+#define FLASH_CIM	(FLASH_CONTROL_BASE | 0x010)
+#define FLASH_MISC	(FLASH_CONTROL_BASE | 0x014)
 
 #define AMISC	1
 #define PMISC	2
@@ -83,11 +88,11 @@ typedef struct stellaris_flash_bank_s
 #define PMASK	2
 
 /* Flash Controller Command bits */
-#define FMC_WRKEY	(0xA442<<16)
-#define FMC_COMT	(1<<3)
-#define FMC_MERASE	(1<<2)
-#define FMC_ERASE	(1<<1)
-#define FMC_WRITE	(1<<0)	
+#define FMC_WRKEY	(0xA442 << 16)
+#define FMC_COMT	(1 << 3)
+#define FMC_MERASE	(1 << 2)
+#define FMC_ERASE	(1 << 1)
+#define FMC_WRITE	(1 << 0)
 
 /* STELLARIS constants */