X-Git-Url: https://git.sur5r.net/?a=blobdiff_plain;f=src%2Fflash%2Fstm32x.c;h=a022b74c303761cd87826b6f134503d17c87032b;hb=bf509dbafa4957ca635c92dc2ea5389e14255a7f;hp=b0d69767777333543b17c8c5b6eb48beabe2b12d;hpb=278ca633da5c7c2d1979129d7db912b1f4784d98;p=openocd

diff --git a/src/flash/stm32x.c b/src/flash/stm32x.c
index b0d69767..a022b74c 100644
--- a/src/flash/stm32x.c
+++ b/src/flash/stm32x.c
@@ -33,7 +33,7 @@ static int stm32x_register_commands(struct command_context_s *cmd_ctx);
 static int stm32x_flash_bank_command(struct command_context_s *cmd_ctx, char *cmd, char **args, int argc, struct flash_bank_s *bank);
 static int stm32x_erase(struct flash_bank_s *bank, int first, int last);
 static int stm32x_protect(struct flash_bank_s *bank, int set, int first, int last);
-static int stm32x_write(struct flash_bank_s *bank, u8 *buffer, u32 offset, u32 count);
+static int stm32x_write(struct flash_bank_s *bank, uint8_t *buffer, uint32_t offset, uint32_t count);
 static int stm32x_probe(struct flash_bank_s *bank);
 static int stm32x_auto_probe(struct flash_bank_s *bank);
 //static int stm32x_handle_part_id_command(struct command_context_s *cmd_ctx, char *cmd, char **args, int argc);
@@ -100,25 +100,25 @@ static int stm32x_flash_bank_command(struct command_context_s *cmd_ctx, char *cm
 	return ERROR_OK;
 }
 
-static u32 stm32x_get_flash_status(flash_bank_t *bank)
+static uint32_t stm32x_get_flash_status(flash_bank_t *bank)
 {
 	target_t *target = bank->target;
-	u32 status;
+	uint32_t status;
 
 	target_read_u32(target, STM32_FLASH_SR, &status);
 
 	return status;
 }
 
-static u32 stm32x_wait_status_busy(flash_bank_t *bank, int timeout)
+static uint32_t stm32x_wait_status_busy(flash_bank_t *bank, int timeout)
 {
 	target_t *target = bank->target;
-	u32 status;
+	uint32_t status;
 
 	/* wait for busy to clear */
 	while (((status = stm32x_get_flash_status(bank)) & FLASH_BSY) && (timeout-- > 0))
 	{
-		LOG_DEBUG("status: 0x%x", status);
+		LOG_DEBUG("status: 0x%" PRIx32 "", status);
 		alive_sleep(1);
 	}
 	/* Clear but report errors */
@@ -131,7 +131,7 @@ static u32 stm32x_wait_status_busy(flash_bank_t *bank, int timeout)
 
 static int stm32x_read_options(struct flash_bank_s *bank)
 {
-	u32 optiondata;
+	uint32_t optiondata;
 	stm32x_flash_bank_t *stm32x_info = NULL;
 	target_t *target = bank->target;
 
@@ -140,7 +140,7 @@ static int stm32x_read_options(struct flash_bank_s *bank)
 	/* read current option bytes */
 	target_read_u32(target, STM32_FLASH_OBR, &optiondata);
 
-	stm32x_info->option_bytes.user_options = (u16)0xFFF8|((optiondata >> 2) & 0x07);
+	stm32x_info->option_bytes.user_options = (uint16_t)0xFFF8|((optiondata >> 2) & 0x07);
 	stm32x_info->option_bytes.RDP = (optiondata & (1 << OPT_READOUT)) ? 0xFFFF : 0x5AA5;
 
 	if (optiondata & (1 << OPT_READOUT))
@@ -149,10 +149,10 @@ static int stm32x_read_options(struct flash_bank_s *bank)
 	/* each bit refers to a 4bank protection */
 	target_read_u32(target, STM32_FLASH_WRPR, &optiondata);
 
-	stm32x_info->option_bytes.protection[0] = (u16)optiondata;
-	stm32x_info->option_bytes.protection[1] = (u16)(optiondata >> 8);
-	stm32x_info->option_bytes.protection[2] = (u16)(optiondata >> 16);
-	stm32x_info->option_bytes.protection[3] = (u16)(optiondata >> 24);
+	stm32x_info->option_bytes.protection[0] = (uint16_t)optiondata;
+	stm32x_info->option_bytes.protection[1] = (uint16_t)(optiondata >> 8);
+	stm32x_info->option_bytes.protection[2] = (uint16_t)(optiondata >> 16);
+	stm32x_info->option_bytes.protection[3] = (uint16_t)(optiondata >> 24);
 
 	return ERROR_OK;
 }
@@ -161,7 +161,7 @@ static int stm32x_erase_options(struct flash_bank_s *bank)
 {
 	stm32x_flash_bank_t *stm32x_info = NULL;
 	target_t *target = bank->target;
-	u32 status;
+	uint32_t status;
 
 	stm32x_info = bank->driver_priv;
 
@@ -198,7 +198,7 @@ static int stm32x_write_options(struct flash_bank_s *bank)
 {
 	stm32x_flash_bank_t *stm32x_info = NULL;
 	target_t *target = bank->target;
-	u32 status;
+	uint32_t status;
 
 	stm32x_info = bank->driver_priv;
 
@@ -283,7 +283,7 @@ static int stm32x_protect_check(struct flash_bank_s *bank)
 	target_t *target = bank->target;
 	stm32x_flash_bank_t *stm32x_info = bank->driver_priv;
 
-	u32 protection;
+	uint32_t protection;
 	int i, s;
 	int num_bits;
 	int set;
@@ -353,7 +353,7 @@ static int stm32x_erase(struct flash_bank_s *bank, int first, int last)
 {
 	target_t *target = bank->target;
 	int i;
-	u32 status;
+	uint32_t status;
 
 	if (bank->target->state != TARGET_HALTED)
 	{
@@ -394,10 +394,10 @@ static int stm32x_protect(struct flash_bank_s *bank, int set, int first, int las
 {
 	stm32x_flash_bank_t *stm32x_info = NULL;
 	target_t *target = bank->target;
-	u16 prot_reg[4] = {0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF};
+	uint16_t prot_reg[4] = {0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF};
 	int i, reg, bit;
 	int status;
-	u32 protection;
+	uint32_t protection;
 
 	stm32x_info = bank->driver_priv;
 
@@ -417,10 +417,10 @@ static int stm32x_protect(struct flash_bank_s *bank, int set, int first, int las
 	 * high density - each bit refers to a 2bank protection */
 	target_read_u32(target, STM32_FLASH_WRPR, &protection);
 
-	prot_reg[0] = (u16)protection;
-	prot_reg[1] = (u16)(protection >> 8);
-	prot_reg[2] = (u16)(protection >> 16);
-	prot_reg[3] = (u16)(protection >> 24);
+	prot_reg[0] = (uint16_t)protection;
+	prot_reg[1] = (uint16_t)(protection >> 8);
+	prot_reg[2] = (uint16_t)(protection >> 16);
+	prot_reg[3] = (uint16_t)(protection >> 24);
 
 	if (stm32x_info->ppage_size == 2)
 	{
@@ -477,18 +477,18 @@ static int stm32x_protect(struct flash_bank_s *bank, int set, int first, int las
 	return stm32x_write_options(bank);
 }
 
-static int stm32x_write_block(struct flash_bank_s *bank, u8 *buffer, u32 offset, u32 count)
+static int stm32x_write_block(struct flash_bank_s *bank, uint8_t *buffer, uint32_t offset, uint32_t count)
 {
 	stm32x_flash_bank_t *stm32x_info = bank->driver_priv;
 	target_t *target = bank->target;
-	u32 buffer_size = 16384;
+	uint32_t buffer_size = 16384;
 	working_area_t *source;
-	u32 address = bank->base + offset;
+	uint32_t address = bank->base + offset;
 	reg_param_t reg_params[4];
 	armv7m_algorithm_t armv7m_info;
 	int retval = ERROR_OK;
 
-	u8 stm32x_flash_write_code[] = {
+	uint8_t stm32x_flash_write_code[] = {
 									/* write: */
 		0xDF, 0xF8, 0x24, 0x40,		/* ldr	r4, STM32_FLASH_CR */
 		0x09, 0x4D,					/* ldr	r5, STM32_FLASH_SR */
@@ -545,7 +545,7 @@ static int stm32x_write_block(struct flash_bank_s *bank, u8 *buffer, u32 offset,
 
 	while (count > 0)
 	{
-		u32 thisrun_count = (count > (buffer_size / 2)) ? (buffer_size / 2) : count;
+		uint32_t thisrun_count = (count > (buffer_size / 2)) ? (buffer_size / 2) : count;
 
 		if ((retval = target_write_buffer(target, source->address, thisrun_count * 2, buffer))!=ERROR_OK)
 			break;
@@ -596,14 +596,14 @@ static int stm32x_write_block(struct flash_bank_s *bank, u8 *buffer, u32 offset,
 	return retval;
 }
 
-static int stm32x_write(struct flash_bank_s *bank, u8 *buffer, u32 offset, u32 count)
+static int stm32x_write(struct flash_bank_s *bank, uint8_t *buffer, uint32_t offset, uint32_t count)
 {
 	target_t *target = bank->target;
-	u32 words_remaining = (count / 2);
-	u32 bytes_remaining = (count & 0x00000001);
-	u32 address = bank->base + offset;
-	u32 bytes_written = 0;
-	u8 status;
+	uint32_t words_remaining = (count / 2);
+	uint32_t bytes_remaining = (count & 0x00000001);
+	uint32_t address = bank->base + offset;
+	uint32_t bytes_written = 0;
+	uint8_t status;
 	int retval;
 
 	if (bank->target->state != TARGET_HALTED)
@@ -614,7 +614,7 @@ static int stm32x_write(struct flash_bank_s *bank, u8 *buffer, u32 offset, u32 c
 
 	if (offset & 0x1)
 	{
-		LOG_WARNING("offset 0x%x breaks required 2-byte alignment", offset);
+		LOG_WARNING("offset 0x%" PRIx32 " breaks required 2-byte alignment", offset);
 		return ERROR_FLASH_DST_BREAKS_ALIGNMENT;
 	}
 
@@ -650,8 +650,8 @@ static int stm32x_write(struct flash_bank_s *bank, u8 *buffer, u32 offset, u32 c
 
 	while (words_remaining > 0)
 	{
-		u16 value;
-		memcpy(&value, buffer + bytes_written, sizeof(u16));
+		uint16_t value;
+		memcpy(&value, buffer + bytes_written, sizeof(uint16_t));
 
 		target_write_u32(target, STM32_FLASH_CR, FLASH_PG);
 		target_write_u16(target, address, value);
@@ -676,7 +676,7 @@ static int stm32x_write(struct flash_bank_s *bank, u8 *buffer, u32 offset, u32 c
 
 	if (bytes_remaining)
 	{
-		u16 value = 0xffff;
+		uint16_t value = 0xffff;
 		memcpy(&value, buffer + bytes_written, bytes_remaining);
 
 		target_write_u32(target, STM32_FLASH_CR, FLASH_PG);
@@ -706,8 +706,8 @@ static int stm32x_probe(struct flash_bank_s *bank)
 	target_t *target = bank->target;
 	stm32x_flash_bank_t *stm32x_info = bank->driver_priv;
 	int i;
-	u16 num_pages;
-	u32 device_id;
+	uint16_t num_pages;
+	uint32_t device_id;
 	int page_size;
 
 	if (bank->target->state != TARGET_HALTED)
@@ -720,7 +720,7 @@ static int stm32x_probe(struct flash_bank_s *bank)
 
 	/* read stm32 device id register */
 	target_read_u32(target, 0xE0042000, &device_id);
-	LOG_INFO( "device id = 0x%08x", device_id );
+	LOG_INFO( "device id = 0x%08" PRIx32 "", device_id );
 
 	/* get flash size from target */
 	if (target_read_u16(target, 0x1FFFF7E0, &num_pages) != ERROR_OK)
@@ -836,7 +836,7 @@ static int stm32x_handle_part_id_command(struct command_context_s *cmd_ctx, char
 static int stm32x_info(struct flash_bank_s *bank, char *buf, int buf_size)
 {
 	target_t *target = bank->target;
-	u32 device_id;
+	uint32_t device_id;
 	int printed;
 
 	/* read stm32 device id register */
@@ -1033,7 +1033,7 @@ static int stm32x_handle_unlock_command(struct command_context_s *cmd_ctx, char
 static int stm32x_handle_options_read_command(struct command_context_s *cmd_ctx, char *cmd, char **args, int argc)
 {
 	flash_bank_t *bank;
-	u32 optionbyte;
+	uint32_t optionbyte;
 	target_t *target = NULL;
 	stm32x_flash_bank_t *stm32x_info = NULL;
 
@@ -1061,27 +1061,27 @@ static int stm32x_handle_options_read_command(struct command_context_s *cmd_ctx,
 	}
 
 	target_read_u32(target, STM32_FLASH_OBR, &optionbyte);
-	command_print(cmd_ctx, "Option Byte: 0x%x", optionbyte);
+	command_print(cmd_ctx, "Option Byte: 0x%" PRIx32 "", optionbyte);
 
-	if (buf_get_u32((u8*)&optionbyte, OPT_ERROR, 1))
+	if (buf_get_u32((uint8_t*)&optionbyte, OPT_ERROR, 1))
 		command_print(cmd_ctx, "Option Byte Complement Error");
 
-	if (buf_get_u32((u8*)&optionbyte, OPT_READOUT, 1))
+	if (buf_get_u32((uint8_t*)&optionbyte, OPT_READOUT, 1))
 		command_print(cmd_ctx, "Readout Protection On");
 	else
 		command_print(cmd_ctx, "Readout Protection Off");
 
-	if (buf_get_u32((u8*)&optionbyte, OPT_RDWDGSW, 1))
+	if (buf_get_u32((uint8_t*)&optionbyte, OPT_RDWDGSW, 1))
 		command_print(cmd_ctx, "Software Watchdog");
 	else
 		command_print(cmd_ctx, "Hardware Watchdog");
 
-	if (buf_get_u32((u8*)&optionbyte, OPT_RDRSTSTOP, 1))
+	if (buf_get_u32((uint8_t*)&optionbyte, OPT_RDRSTSTOP, 1))
 		command_print(cmd_ctx, "Stop: No reset generated");
 	else
 		command_print(cmd_ctx, "Stop: Reset generated");
 
-	if (buf_get_u32((u8*)&optionbyte, OPT_RDRSTSTDBY, 1))
+	if (buf_get_u32((uint8_t*)&optionbyte, OPT_RDRSTSTDBY, 1))
 		command_print(cmd_ctx, "Standby: No reset generated");
 	else
 		command_print(cmd_ctx, "Standby: Reset generated");
@@ -1094,7 +1094,7 @@ static int stm32x_handle_options_write_command(struct command_context_s *cmd_ctx
 	flash_bank_t *bank;
 	target_t *target = NULL;
 	stm32x_flash_bank_t *stm32x_info = NULL;
-	u16 optionbyte = 0xF8;
+	uint16_t optionbyte = 0xF8;
 
 	if (argc < 4)
 	{
@@ -1168,7 +1168,7 @@ static int stm32x_handle_options_write_command(struct command_context_s *cmd_ctx
 static int stm32x_mass_erase(struct flash_bank_s *bank)
 {
 	target_t *target = bank->target;
-	u32 status;
+	uint32_t status;
 
 	if (target->state != TARGET_HALTED)
 	{