X-Git-Url: https://git.sur5r.net/?a=blobdiff_plain;f=src%2Fsim65%2Fchips%2Fram.c;h=61691aaa89943de926fc25569123ced5d61bd2c4;hb=85885001b133e2dc320b6f6459259afa69784ca8;hp=6ca4b5089de8f8409eedb625fe52ded66b667cbf;hpb=44fd1082ae807a0b6b4046c65914e20a7e27101c;p=cc65

diff --git a/src/sim65/chips/ram.c b/src/sim65/chips/ram.c
index 6ca4b5089..61691aaa8 100644
--- a/src/sim65/chips/ram.c
+++ b/src/sim65/chips/ram.c
@@ -1,8 +1,8 @@
 /*****************************************************************************/
 /*                                                                           */
-/*				     ram.c				     */
+/*                                   ram.c                                   */
 /*                                                                           */
-/*		    RAM plugin for the sim65 6502 simulator		     */
+/*                  RAM plugin for the sim65 6502 simulator                  */
 /*                                                                           */
 /*                                                                           */
 /*                                                                           */
@@ -87,7 +87,7 @@ static const struct ChipData CData[1] = {
         /* -- Exported functions -- */
         InitChip,
         CreateInstance,
-	DestroyInstance,
+        DestroyInstance,
         WriteCtrl,
         Write,
         ReadCtrl,
@@ -100,7 +100,7 @@ static const SimData* Sim;
 
 /* Possible RAM attributes */
 #define ATTR_INITIALIZED        0x01    /* RAM cell is intialized */
-#define ATTR_WPROT		0x02	/* RAM cell is write protected */
+#define ATTR_WPROT              0x02    /* RAM cell is write protected */
 
 /* Data for one RAM instance */
 typedef struct InstanceData InstanceData;