X-Git-Url: https://git.sur5r.net/?a=blobdiff_plain;f=src%2Ftarget%2Farm11.h;h=1a890d063e78238bf777e6e67675de3a725e91de;hb=647e61cc6d9b13dd2799d2302ce9289a1627e36c;hp=5c83ec69a6199a1cd74bf7b831db807c5a7a5ca7;hpb=bd7d019b56a17c133f2696ae0e16f280f01236a8;p=openocd

diff --git a/src/target/arm11.h b/src/target/arm11.h
index 5c83ec69..1a890d06 100644
--- a/src/target/arm11.h
+++ b/src/target/arm11.h
@@ -51,6 +51,19 @@
 #define ARM11_TAP_DEFAULT			TAP_INVALID
 
 
+#define CHECK_RETVAL(action)								\
+do {														\
+	int __retval = (action);								\
+															\
+	if (__retval != ERROR_OK)								\
+	{														\
+		LOG_DEBUG("error while calling \"" # action "\"");	\
+		return __retval;									\
+	}														\
+															\
+} while (0)
+
+
 typedef struct arm11_register_history_s
 {
 	u32		value;
@@ -239,14 +252,14 @@ void arm11_setup_field			(arm11_common_t * arm11, int num_bits, void * in_data,
 void arm11_add_IR				(arm11_common_t * arm11, u8 instr, tap_state_t state);
 void arm11_add_debug_SCAN_N		(arm11_common_t * arm11, u8 chain, tap_state_t state);
 void arm11_add_debug_INST		(arm11_common_t * arm11, u32 inst, u8 * flag, tap_state_t state);
-int arm11_read_DSCR			(arm11_common_t * arm11, u32 *dscr);
+int arm11_read_DSCR				(arm11_common_t * arm11, u32 *dscr);
 int arm11_write_DSCR			(arm11_common_t * arm11, u32 dscr);
 
 enum target_debug_reason arm11_get_DSCR_debug_reason(u32 dscr);
 
 void arm11_run_instr_data_prepare			(arm11_common_t * arm11);
 void arm11_run_instr_data_finish			(arm11_common_t * arm11);
-int arm11_run_instr_no_data				(arm11_common_t * arm11, u32 * opcode, size_t count);
+int arm11_run_instr_no_data					(arm11_common_t * arm11, u32 * opcode, size_t count);
 void arm11_run_instr_no_data1				(arm11_common_t * arm11, u32 opcode);
 int arm11_run_instr_data_to_core			(arm11_common_t * arm11, u32 opcode, u32 * data, size_t count);
 int arm11_run_instr_data_to_core_noack		(arm11_common_t * arm11, u32 opcode, u32 * data, size_t count);