X-Git-Url: https://git.sur5r.net/?a=blobdiff_plain;f=src%2Ftarget%2Farm11.h;h=53b2fe6b1bb7b8b8ac8fcd77eae758b6a89b225d;hb=350f608256d167851a13f6b976c465b54f1056ad;hp=f8fea1a19e0dfa6f47d619859fe0538e2eda0b77;hpb=9ba80f08f47285817acbd22970ed2fe2855c21d2;p=openocd

diff --git a/src/target/arm11.h b/src/target/arm11.h
index f8fea1a1..53b2fe6b 100644
--- a/src/target/arm11.h
+++ b/src/target/arm11.h
@@ -1,5 +1,6 @@
 /***************************************************************************
  *   Copyright (C) 2008 digenius technology GmbH.                          *
+ *   Michael Bruck                                                         *
  *                                                                         *
  *   Copyright (C) 2008 Georg Acher <acher@in.tum.de>                      *
  *                                                                         *
@@ -24,9 +25,7 @@
 
 #include "target.h"
 #include "register.h"
-#include "embeddedice.h"
-#include "arm_jtag.h"
-#include "types.h"
+#include "jtag.h"
 
 #define asizeof(x)	(sizeof(x) / sizeof((x)[0]))
 
@@ -56,7 +55,10 @@ do {														\
 	int __retval = (action);								\
 															\
 	if (__retval != ERROR_OK)								\
+	{														\
+		LOG_DEBUG("error while calling \"" # action "\"");	\
 		return __retval;									\
+	}														\
 															\
 } while (0)
 
@@ -79,8 +81,6 @@ typedef struct arm11_common_s
 {
 	target_t *	target;		/**< Reference back to the owner */
 
-	arm_jtag_t	jtag_info;	/**< Handler to access assigned JTAG device */
-
 	/** \name Processor type detection */
 	/*@{*/
 
@@ -249,14 +249,14 @@ void arm11_setup_field			(arm11_common_t * arm11, int num_bits, void * in_data,
 void arm11_add_IR				(arm11_common_t * arm11, u8 instr, tap_state_t state);
 void arm11_add_debug_SCAN_N		(arm11_common_t * arm11, u8 chain, tap_state_t state);
 void arm11_add_debug_INST		(arm11_common_t * arm11, u32 inst, u8 * flag, tap_state_t state);
-int arm11_read_DSCR			(arm11_common_t * arm11, u32 *dscr);
+int arm11_read_DSCR				(arm11_common_t * arm11, u32 *dscr);
 int arm11_write_DSCR			(arm11_common_t * arm11, u32 dscr);
 
 enum target_debug_reason arm11_get_DSCR_debug_reason(u32 dscr);
 
 void arm11_run_instr_data_prepare			(arm11_common_t * arm11);
 void arm11_run_instr_data_finish			(arm11_common_t * arm11);
-int arm11_run_instr_no_data				(arm11_common_t * arm11, u32 * opcode, size_t count);
+int arm11_run_instr_no_data					(arm11_common_t * arm11, u32 * opcode, size_t count);
 void arm11_run_instr_no_data1				(arm11_common_t * arm11, u32 opcode);
 int arm11_run_instr_data_to_core			(arm11_common_t * arm11, u32 opcode, u32 * data, size_t count);
 int arm11_run_instr_data_to_core_noack		(arm11_common_t * arm11, u32 opcode, u32 * data, size_t count);