X-Git-Url: https://git.sur5r.net/?a=blobdiff_plain;f=src%2Ftarget%2Farm966e.c;h=84c55cf4849ef473b9a6c8d7089fdd899a414079;hb=7805be1b3a8f65aff9a861fd8ca62518143f1524;hp=616fb9463aa65a62d1b522f2050052d4b2b08264;hpb=e8af4de0a7d224e1aa28e72f0de1ddf0bec5beb8;p=openocd

diff --git a/src/target/arm966e.c b/src/target/arm966e.c
index 616fb946..84c55cf4 100644
--- a/src/target/arm966e.c
+++ b/src/target/arm966e.c
@@ -54,6 +54,8 @@ target_type_t arm966e_target =
 	.poll = arm7_9_poll,
 	.arch_state = armv4_5_arch_state,
 
+	.target_request_data = arm7_9_target_request_data,
+
 	.halt = arm7_9_halt,
 	.resume = arm7_9_resume,
 	.step = arm7_9_step,
@@ -61,14 +63,14 @@ target_type_t arm966e_target =
 	.assert_reset = arm7_9_assert_reset,
 	.deassert_reset = arm7_9_deassert_reset,
 	.soft_reset_halt = arm7_9_soft_reset_halt,
-	.prepare_reset_halt = arm7_9_prepare_reset_halt,
 
 	.get_gdb_reg_list = armv4_5_get_gdb_reg_list,
 
 	.read_memory = arm7_9_read_memory,
 	.write_memory = arm7_9_write_memory,
 	.bulk_write_memory = arm7_9_bulk_write_memory,
-
+	.checksum_memory = arm7_9_checksum_memory,
+	
 	.run_algorithm = armv4_5_run_algorithm,
 	
 	.add_breakpoint = arm7_9_add_breakpoint,
@@ -122,10 +124,11 @@ int arm966e_target_command(struct command_context_s *cmd_ctx, char *cmd, char **
 	int chain_pos;
 	char *variant = NULL;
 	arm966e_common_t *arm966e = malloc(sizeof(arm966e_common_t));
+	memset(arm966e, 0, sizeof(*arm966e));
 	
 	if (argc < 4)
 	{
-		ERROR("'target arm966e' requires at least one additional argument");
+		LOG_ERROR("'target arm966e' requires at least one additional argument");
 		exit(-1);
 	}
 	
@@ -134,7 +137,7 @@ int arm966e_target_command(struct command_context_s *cmd_ctx, char *cmd, char **
 	if (argc >= 5)
 		variant = args[4];
 	
-	DEBUG("chain_pos: %i, variant: %s", chain_pos, variant);
+	LOG_DEBUG("chain_pos: %i, variant: %s", chain_pos, variant);
 	
 	arm966e_init_arch_info(target, arm966e, chain_pos, variant);
 
@@ -222,11 +225,17 @@ int arm966e_read_cp15(target_t *target, int reg_addr, u32 *value)
 	fields[2].in_handler = NULL;
 	fields[2].in_handler_priv = NULL;
 	
-	jtag_add_dr_scan(3, fields, -1, NULL);
+	jtag_add_dr_scan(3, fields, -1);
+
+	fields[0].in_handler_priv = value;
+	fields[0].in_handler = arm_jtag_buf_to_u32;
 
-	fields[0].in_value = (u8*)value;
+	jtag_add_dr_scan(3, fields, -1);
 
-	jtag_add_dr_scan(3, fields, -1, NULL);
+#ifdef _DEBUG_INSTRUCTION_EXECUTION_
+	jtag_execute_queue();
+	LOG_DEBUG("addr: 0x%x value: %8.8x", reg_addr, *value);
+#endif
 
 	return ERROR_OK;
 }
@@ -239,6 +248,9 @@ int arm966e_write_cp15(target_t *target, int reg_addr, u32 value)
 	scan_field_t fields[3];
 	u8 reg_addr_buf = reg_addr & 0x3f;
 	u8 nr_w_buf = 1;
+	u8 value_buf[4];
+	
+	buf_set_u32(value_buf, 0, 32, value);
 	
 	jtag_add_end_state(TAP_RTI);
 	arm_jtag_scann(jtag_info, 0xf);
@@ -246,7 +258,7 @@ int arm966e_write_cp15(target_t *target, int reg_addr, u32 value)
 
 	fields[0].device = jtag_info->chain_pos;
 	fields[0].num_bits = 32;
-	fields[0].out_value = (u8*)&value;
+	fields[0].out_value = value_buf;
 	fields[0].out_mask = NULL;
 	fields[0].in_value = NULL;
 	fields[0].in_check_value = NULL;
@@ -274,7 +286,11 @@ int arm966e_write_cp15(target_t *target, int reg_addr, u32 value)
 	fields[2].in_handler = NULL;
 	fields[2].in_handler_priv = NULL;
 	
-	jtag_add_dr_scan(3, fields, -1, NULL);
+	jtag_add_dr_scan(3, fields, -1);
+
+#ifdef _DEBUG_INSTRUCTION_EXECUTION_
+	LOG_DEBUG("addr: 0x%x value: %8.8x", reg_addr, value);
+#endif
 
 	return ERROR_OK;
 }