X-Git-Url: https://git.sur5r.net/?a=blobdiff_plain;f=src%2Ftarget%2Farmv4_5.c;h=b5e33ff5466fdf2ec010349c24e2db57830c97e0;hb=4e56a2303b3f68bb647d8bb640a830f7f21ea231;hp=ec6d5a0e31e18826bd7b1147b0ad873187cf520a;hpb=833e7f5248778bcb31b4db1a1b91160995415203;p=openocd

diff --git a/src/target/armv4_5.c b/src/target/armv4_5.c
index ec6d5a0e..b5e33ff5 100644
--- a/src/target/armv4_5.c
+++ b/src/target/armv4_5.c
@@ -390,6 +390,10 @@ void arm_set_cpsr(struct arm *arm, uint32_t cpsr)
 			state = ARMV4_5_STATE_ARM;
 	}
 	arm->core_state = state;
+
+	LOG_DEBUG("set CPSR %#8.8x: %s mode, %s state", (unsigned) cpsr,
+			arm_mode_name(mode),
+			armv4_5_state_strings[arm->core_state]);
 }
 
 /**
@@ -786,27 +790,38 @@ usage:
 	return retval;
 }
 
-int armv4_5_register_commands(struct command_context *cmd_ctx)
-{
-	struct command *armv4_5_cmd;
-
-	armv4_5_cmd = COMMAND_REGISTER(cmd_ctx, NULL, "arm",
-			NULL, COMMAND_ANY,
-			"generic ARM commands");
-
-	COMMAND_REGISTER(cmd_ctx, armv4_5_cmd, "reg",
-			handle_armv4_5_reg_command, COMMAND_EXEC,
-			"display ARM core registers");
-	COMMAND_REGISTER(cmd_ctx, armv4_5_cmd, "core_state",
-			handle_armv4_5_core_state_command, COMMAND_EXEC,
-			"display/change ARM core state <arm | thumb>");
-	COMMAND_REGISTER(cmd_ctx, armv4_5_cmd, "disassemble",
-			handle_armv4_5_disassemble_command, COMMAND_EXEC,
-			"disassemble instructions "
-				"<address> [<count> ['thumb']]");
-
-	return ERROR_OK;
-}
+static const struct command_registration arm_exec_command_handlers[] = {
+	{
+		.name = "reg",
+		.handler = &handle_armv4_5_reg_command,
+		.mode = COMMAND_EXEC,
+		.help = "display ARM core registers",
+	},
+	{
+		.name = "core_state",
+		.handler = &handle_armv4_5_core_state_command,
+		.mode = COMMAND_EXEC,
+		.usage = "<arm | thumb>",
+		.help = "display/change ARM core state",
+	},
+	{
+		.name = "disassemble",
+		.handler = &handle_armv4_5_disassemble_command,
+		.mode = COMMAND_EXEC,
+		.usage = "<address> [<count> ['thumb']]",
+		.help = "disassemble instructions ",
+	},
+	COMMAND_REGISTRATION_DONE
+};
+const struct command_registration arm_command_handlers[] = {
+	{
+		.name = "arm",
+		.mode = COMMAND_ANY,
+		.help = "ARM command group",
+		.chain = arm_exec_command_handlers,
+	},
+	COMMAND_REGISTRATION_DONE
+};
 
 int armv4_5_get_gdb_reg_list(struct target *target, struct reg **reg_list[], int *reg_list_size)
 {
@@ -864,7 +879,13 @@ static int armv4_5_run_algorithm_completion(struct target *target, uint32_t exit
 	return ERROR_OK;
 }
 
-int armv4_5_run_algorithm_inner(struct target *target, int num_mem_params, struct mem_param *mem_params, int num_reg_params, struct reg_param *reg_params, uint32_t entry_point, uint32_t exit_point, int timeout_ms, void *arch_info, int (*run_it)(struct target *target, uint32_t exit_point, int timeout_ms, void *arch_info))
+int armv4_5_run_algorithm_inner(struct target *target,
+		int num_mem_params, struct mem_param *mem_params,
+		int num_reg_params, struct reg_param *reg_params,
+		uint32_t entry_point, uint32_t exit_point,
+		int timeout_ms, void *arch_info,
+		int (*run_it)(struct target *target, uint32_t exit_point,
+				int timeout_ms, void *arch_info))
 {
 	struct arm *armv4_5 = target_to_armv4_5(target);
 	struct armv4_5_algorithm *armv4_5_algorithm_info = arch_info;
@@ -874,6 +895,7 @@ int armv4_5_run_algorithm_inner(struct target *target, int num_mem_params, struc
 	int exit_breakpoint_size = 0;
 	int i;
 	int retval = ERROR_OK;
+
 	LOG_DEBUG("Running algorithm");
 
 	if (armv4_5_algorithm_info->common_magic != ARMV4_5_COMMON_MAGIC)