X-Git-Url: https://git.sur5r.net/?a=blobdiff_plain;f=src%2Ftarget%2Farmv7m.h;h=9dd4ddbb82267740d69ea0003a69bc6c3d088a69;hb=df95fe25a4f01db9e131272ee72ebbf328ede428;hp=60f4cba0eb9ea0a533f5ac3a3e2979422dacf45d;hpb=d0dee7ccafcf87259fadf6c5de43df8583b0e885;p=openocd diff --git a/src/target/armv7m.h b/src/target/armv7m.h index 60f4cba0..9dd4ddbb 100644 --- a/src/target/armv7m.h +++ b/src/target/armv7m.h @@ -27,6 +27,7 @@ #define ARMV7M_COMMON_H #include "arm_adi_v5.h" +#include "armv4_5.h" /* define for enabling armv7 gdb workarounds */ #if 1 @@ -100,21 +101,21 @@ struct armv7m_common struct swjdp_common swjdp_info; /* Direct processor core register read and writes */ - int (*load_core_reg_u32)(struct target_s *target, enum armv7m_regtype type, uint32_t num, uint32_t *value); - int (*store_core_reg_u32)(struct target_s *target, enum armv7m_regtype type, uint32_t num, uint32_t value); + int (*load_core_reg_u32)(struct target *target, enum armv7m_regtype type, uint32_t num, uint32_t *value); + int (*store_core_reg_u32)(struct target *target, enum armv7m_regtype type, uint32_t num, uint32_t value); /* register cache to processor synchronization */ - int (*read_core_reg)(struct target_s *target, int num); - int (*write_core_reg)(struct target_s *target, int num); + int (*read_core_reg)(struct target *target, unsigned num); + int (*write_core_reg)(struct target *target, unsigned num); - int (*examine_debug_reason)(target_t *target); - void (*post_debug_entry)(target_t *target); + int (*examine_debug_reason)(struct target *target); + void (*post_debug_entry)(struct target *target); - void (*pre_restore_context)(target_t *target); - void (*post_restore_context)(target_t *target); + void (*pre_restore_context)(struct target *target); + void (*post_restore_context)(struct target *target); }; static inline struct armv7m_common * -target_to_armv7m(struct target_s *target) +target_to_armv7m(struct target *target) { return target->arch_info; } @@ -130,34 +131,34 @@ struct armv7m_core_reg { uint32_t num; enum armv7m_regtype type; - target_t *target; + struct target *target; struct armv7m_common *armv7m_common; }; -struct reg_cache *armv7m_build_reg_cache(target_t *target); +struct reg_cache *armv7m_build_reg_cache(struct target *target); enum armv7m_mode armv7m_number_to_mode(int number); int armv7m_mode_to_number(enum armv7m_mode mode); -int armv7m_arch_state(struct target_s *target); -int armv7m_get_gdb_reg_list(target_t *target, +int armv7m_arch_state(struct target *target); +int armv7m_get_gdb_reg_list(struct target *target, struct reg **reg_list[], int *reg_list_size); -int armv7m_register_commands(struct command_context_s *cmd_ctx); -int armv7m_init_arch_info(target_t *target, struct armv7m_common *armv7m); +int armv7m_register_commands(struct command_context *cmd_ctx); +int armv7m_init_arch_info(struct target *target, struct armv7m_common *armv7m); -int armv7m_run_algorithm(struct target_s *target, +int armv7m_run_algorithm(struct target *target, int num_mem_params, struct mem_param *mem_params, int num_reg_params, struct reg_param *reg_params, uint32_t entry_point, uint32_t exit_point, int timeout_ms, void *arch_info); -int armv7m_invalidate_core_regs(target_t *target); +int armv7m_invalidate_core_regs(struct target *target); -int armv7m_restore_context(target_t *target); +int armv7m_restore_context(struct target *target); -int armv7m_checksum_memory(struct target_s *target, +int armv7m_checksum_memory(struct target *target, uint32_t address, uint32_t count, uint32_t* checksum); -int armv7m_blank_check_memory(struct target_s *target, +int armv7m_blank_check_memory(struct target *target, uint32_t address, uint32_t count, uint32_t* blank); /* Thumb mode instructions