X-Git-Url: https://git.sur5r.net/?a=blobdiff_plain;f=src%2Ftarget%2Fcortex_m3.c;h=be81af98a1644977f8b7aab42be3e7125df10b4c;hb=97fbd793b3a4edec490b2b034f7b6fe5261ca03e;hp=e7b5110791c74438519082dfd477c4bd737bec27;hpb=75a37eb5b37386768327e9670acfedc7811d529f;p=openocd diff --git a/src/target/cortex_m3.c b/src/target/cortex_m3.c index e7b51107..be81af98 100644 --- a/src/target/cortex_m3.c +++ b/src/target/cortex_m3.c @@ -221,7 +221,7 @@ static int cortex_m3_endreset_event(struct target *target) } swjdp_transaction_endcheck(swjdp); - armv7m_invalidate_core_regs(target); + register_cache_invalidate(cortex_m3->armv7m.core_cache); /* make sure we have latest dhcsr flags */ mem_ap_read_atomic_u32(swjdp, DCB_DHCSR, &cortex_m3->dcb_dhcsr); @@ -510,7 +510,7 @@ static int cortex_m3_soft_reset_halt(struct target *target) target->state = TARGET_RESET; /* registers are now invalid */ - armv7m_invalidate_core_regs(target); + register_cache_invalidate(cortex_m3->armv7m.core_cache); while (timeout < 100) { @@ -617,7 +617,8 @@ static int cortex_m3_resume(struct target *target, int current, target->debug_reason = DBG_REASON_NOTHALTED; /* registers are now invalid */ - armv7m_invalidate_core_regs(target); + register_cache_invalidate(armv7m->core_cache); + if (!debug_execution) { target->state = TARGET_RUNNING; @@ -673,7 +674,7 @@ static int cortex_m3_step(struct target *target, int current, mem_ap_read_atomic_u32(swjdp, DCB_DHCSR, &cortex_m3->dcb_dhcsr); /* registers are now invalid */ - armv7m_invalidate_core_regs(target); + register_cache_invalidate(cortex_m3->armv7m.core_cache); if (breakpoint) cortex_m3_set_breakpoint(target, breakpoint); @@ -812,7 +813,7 @@ static int cortex_m3_assert_reset(struct target *target) target->state = TARGET_RESET; jtag_add_sleep(50000); - armv7m_invalidate_core_regs(target); + register_cache_invalidate(cortex_m3->armv7m.core_cache); if (target->reset_halt) { @@ -1911,27 +1912,44 @@ COMMAND_HANDLER(handle_cortex_m3_mask_interrupts_command) return ERROR_OK; } +static const struct command_registration cortex_m3_exec_command_handlers[] = { + { + .name = "disassemble", + .handler = &handle_cortex_m3_disassemble_command, + .mode = COMMAND_EXEC, + .help = "disassemble Thumb2 instructions", + .usage = "
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