X-Git-Url: https://git.sur5r.net/?a=blobdiff_plain;f=src%2Ftarget%2Fcortex_m3.h;h=0072e84b4525eaba7a2128ca6c68a8ed4d148e37;hb=7805be1b3a8f65aff9a861fd8ca62518143f1524;hp=7932dff861a1926fb5798d7bf662b6e8371a953a;hpb=68b97e4b5c40a70b42dc2a970f1b90b9a3e9f13d;p=openocd

diff --git a/src/target/cortex_m3.h b/src/target/cortex_m3.h
index 7932dff8..0072e84b 100644
--- a/src/target/cortex_m3.h
+++ b/src/target/cortex_m3.h
@@ -1,6 +1,7 @@
 /***************************************************************************
  *   Copyright (C) 2005 by Dominic Rath                                    *
  *   Dominic.Rath@gmx.de                                                   *
+ *                                                                         *
  *   Copyright (C) 2006 by Magnus Lundin                                   *
  *   lundin@mlu.mine.nu                                                    *
  *                                                                         *
@@ -133,8 +134,7 @@ typedef struct  cortex_m3_dwt_comparator_s
 typedef struct cortex_m3_common_s
 {
 	int common_magic;
-//	int (*full_context)(struct target_s *target);
-
+	
 	arm_jtag_t jtag_info;
 	
 	/* Context information */
@@ -158,38 +158,14 @@ typedef struct cortex_m3_common_s
 	int intlinesnum;
 	u32 *intsetenable;
 	
-/*
-	u32 arm_bkpt;
-	u16 thumb_bkpt;
-	int sw_bkpts_use_wp;
-	int wp_available;
-	int wp0_used;
-	int wp1_used;
-	
-	int force_hw_bkpts;
-	int dbgreq_adjust_pc;
-	int use_dbgrq;
-	int has_etm;
-	
-	int reinit_embeddedice;
-	
-	struct working_area_s *dcc_working_area;
-	
-	int fast_memory_access;
-	int dcc_downloads;
-*/
-	/* breakpoint use map */
-	int sw_bkpts_enabled;
-
 	armv7m_common_t armv7m;
 	swjdp_common_t swjdp_info;
-	
 	void *arch_info;
 } cortex_m3_common_t;
 
 extern void cortex_m3_build_reg_cache(target_t *target);
 
-enum target_state cortex_m3_poll(target_t *target);
+int cortex_m3_poll(target_t *target);
 int cortex_m3_halt(target_t *target);
 int cortex_m3_resume(struct target_s *target, int current, u32 address, int handle_breakpoints, int debug_execution);
 int cortex_m3_step(struct target_s *target, int current, u32 address, int handle_breakpoints);
@@ -197,7 +173,6 @@ int cortex_m3_step(struct target_s *target, int current, u32 address, int handle
 int cortex_m3_assert_reset(target_t *target);
 int cortex_m3_deassert_reset(target_t *target);
 int cortex_m3_soft_reset_halt(struct target_s *target);
-int cortex_m3_prepare_reset_halt(struct target_s *target);
 
 int cortex_m3_read_memory(struct target_s *target, u32 address, u32 size, u32 count, u8 *buffer);
 int cortex_m3_write_memory(struct target_s *target, u32 address, u32 size, u32 count, u8 *buffer);