X-Git-Url: https://git.sur5r.net/?a=blobdiff_plain;f=src%2Ftarget%2Fmips32_dmaacc.c;h=e67c4ce744e082b65d12957463a112e3aa228024;hb=c493543fc93cb693abab3146e08314b63d137470;hp=edb7b53b17a28dac4c5be9b080fdb69595a8e403;hpb=86173cdbddde781b19ac630602f2d450a59b32b5;p=openocd

diff --git a/src/target/mips32_dmaacc.c b/src/target/mips32_dmaacc.c
index edb7b53b..e67c4ce7 100644
--- a/src/target/mips32_dmaacc.c
+++ b/src/target/mips32_dmaacc.c
@@ -39,10 +39,10 @@
  * displaying/modifying memory and memory mapped registers.
  */
 
-static int ejtag_dma_read(mips_ejtag_t *ejtag_info, u32 addr, u32 *data)
+static int ejtag_dma_read(mips_ejtag_t *ejtag_info, uint32_t addr, uint32_t *data)
 {
-	u32 v;
-	u32 ejtag_ctrl;
+	uint32_t v;
+	uint32_t ejtag_ctrl;
 	int retries = RETRY_ATTEMPTS;
 
 begin_ejtag_dma_read:
@@ -61,7 +61,7 @@ begin_ejtag_dma_read:
 	do {
 		ejtag_ctrl = EJTAG_CTRL_DMAACC | ejtag_info->ejtag_ctrl;
 		mips_ejtag_drscan_32(ejtag_info, &ejtag_ctrl);
-	} while(ejtag_ctrl & EJTAG_CTRL_DSTRT);
+	} while (ejtag_ctrl & EJTAG_CTRL_DSTRT);
 
 	/* Read Data */
 	mips_ejtag_set_instr(ejtag_info, EJTAG_INST_DATA, NULL);
@@ -74,21 +74,21 @@ begin_ejtag_dma_read:
 	if (ejtag_ctrl  & EJTAG_CTRL_DERR)
 	{
 		if (retries--) {
-			LOG_ERROR("DMA Read Addr = %08x  Data = ERROR ON READ (retrying)\n", addr);
+			LOG_ERROR("DMA Read Addr = %08" PRIx32 "  Data = ERROR ON READ (retrying)\n", addr);
 			goto begin_ejtag_dma_read;
 		}
 		else
-			LOG_ERROR("DMA Read Addr = %08x  Data = ERROR ON READ\n", addr);
+			LOG_ERROR("DMA Read Addr = %08" PRIx32 "  Data = ERROR ON READ\n", addr);
 		return ERROR_JTAG_DEVICE_ERROR;
 	}
 
 	return ERROR_OK;
 }
 
-static int ejtag_dma_read_h(mips_ejtag_t *ejtag_info, u32 addr, u16 *data)
+static int ejtag_dma_read_h(mips_ejtag_t *ejtag_info, uint32_t addr, uint16_t *data)
 {
-	u32 v;
-	u32 ejtag_ctrl;
+	uint32_t v;
+	uint32_t ejtag_ctrl;
 	int retries = RETRY_ATTEMPTS;
 
 begin_ejtag_dma_read_h:
@@ -107,7 +107,7 @@ begin_ejtag_dma_read_h:
 	do {
 		ejtag_ctrl = EJTAG_CTRL_DMAACC | ejtag_info->ejtag_ctrl;
 		mips_ejtag_drscan_32(ejtag_info, &ejtag_ctrl);
-	} while(ejtag_ctrl & EJTAG_CTRL_DSTRT);
+	} while (ejtag_ctrl & EJTAG_CTRL_DSTRT);
 
 	/* Read Data */
 	mips_ejtag_set_instr(ejtag_info, EJTAG_INST_DATA, NULL);
@@ -120,11 +120,11 @@ begin_ejtag_dma_read_h:
 	if (ejtag_ctrl  & EJTAG_CTRL_DERR)
 	{
 		if (retries--) {
-			LOG_ERROR("DMA Read Addr = %08x  Data = ERROR ON READ (retrying)\n", addr);
+			LOG_ERROR("DMA Read Addr = %08" PRIx32 "  Data = ERROR ON READ (retrying)\n", addr);
 			goto begin_ejtag_dma_read_h;
 		}
 		else
-			LOG_ERROR("DMA Read Addr = %08x  Data = ERROR ON READ\n", addr);
+			LOG_ERROR("DMA Read Addr = %08" PRIx32 "  Data = ERROR ON READ\n", addr);
 		return ERROR_JTAG_DEVICE_ERROR;
 	}
 
@@ -137,10 +137,10 @@ begin_ejtag_dma_read_h:
 	return ERROR_OK;
 }
 
-static int ejtag_dma_read_b(mips_ejtag_t *ejtag_info, u32 addr, uint8_t *data)
+static int ejtag_dma_read_b(mips_ejtag_t *ejtag_info, uint32_t addr, uint8_t *data)
 {
-	u32 v;
-	u32 ejtag_ctrl;
+	uint32_t v;
+	uint32_t ejtag_ctrl;
 	int retries = RETRY_ATTEMPTS;
 
 begin_ejtag_dma_read_b:
@@ -159,7 +159,7 @@ begin_ejtag_dma_read_b:
 	do {
 		ejtag_ctrl = EJTAG_CTRL_DMAACC | ejtag_info->ejtag_ctrl;
 		mips_ejtag_drscan_32(ejtag_info, &ejtag_ctrl);
-	} while(ejtag_ctrl & EJTAG_CTRL_DSTRT);
+	} while (ejtag_ctrl & EJTAG_CTRL_DSTRT);
 
 	/* Read Data */
 	mips_ejtag_set_instr(ejtag_info, EJTAG_INST_DATA, NULL);
@@ -172,11 +172,11 @@ begin_ejtag_dma_read_b:
 	if (ejtag_ctrl  & EJTAG_CTRL_DERR)
 	{
 		if (retries--) {
-			LOG_ERROR("DMA Read Addr = %08x  Data = ERROR ON READ (retrying)\n", addr);
+			LOG_ERROR("DMA Read Addr = %08" PRIx32 "  Data = ERROR ON READ (retrying)\n", addr);
 			goto begin_ejtag_dma_read_b;
 		}
 		else
-			LOG_ERROR("DMA Read Addr = %08x  Data = ERROR ON READ\n", addr);
+			LOG_ERROR("DMA Read Addr = %08" PRIx32 "  Data = ERROR ON READ\n", addr);
 		return ERROR_JTAG_DEVICE_ERROR;
 	}
 
@@ -199,10 +199,10 @@ begin_ejtag_dma_read_b:
 	return ERROR_OK;
 }
 
-static int ejtag_dma_write(mips_ejtag_t *ejtag_info, u32 addr, u32 data)
+static int ejtag_dma_write(mips_ejtag_t *ejtag_info, uint32_t addr, uint32_t data)
 {
-	u32 v;
-	u32 ejtag_ctrl;
+	uint32_t v;
+	uint32_t ejtag_ctrl;
 	int retries = RETRY_ATTEMPTS;
 
 begin_ejtag_dma_write:
@@ -226,7 +226,7 @@ begin_ejtag_dma_write:
 	do {
 		ejtag_ctrl = EJTAG_CTRL_DMAACC | ejtag_info->ejtag_ctrl;
 		mips_ejtag_drscan_32(ejtag_info, &ejtag_ctrl);
-	} while(ejtag_ctrl & EJTAG_CTRL_DSTRT);
+	} while (ejtag_ctrl & EJTAG_CTRL_DSTRT);
 
 	/* Clear DMA & Check DERR */
 	mips_ejtag_set_instr(ejtag_info, EJTAG_INST_CONTROL, NULL);
@@ -235,21 +235,21 @@ begin_ejtag_dma_write:
 	if (ejtag_ctrl  & EJTAG_CTRL_DERR)
 	{
 		if (retries--) {
-			LOG_ERROR("DMA Write Addr = %08x  Data = ERROR ON WRITE (retrying)\n", addr);
+			LOG_ERROR("DMA Write Addr = %08" PRIx32 "  Data = ERROR ON WRITE (retrying)\n", addr);
 			goto begin_ejtag_dma_write;
 		}
 		else
-			LOG_ERROR("DMA Write Addr = %08x  Data = ERROR ON WRITE\n", addr);
+			LOG_ERROR("DMA Write Addr = %08" PRIx32 "  Data = ERROR ON WRITE\n", addr);
 		return ERROR_JTAG_DEVICE_ERROR;
 	}
 
 	return ERROR_OK;
 }
 
-static int ejtag_dma_write_h(mips_ejtag_t *ejtag_info, u32 addr, u32 data)
+static int ejtag_dma_write_h(mips_ejtag_t *ejtag_info, uint32_t addr, uint32_t data)
 {
-	u32 v;
-	u32 ejtag_ctrl;
+	uint32_t v;
+	uint32_t ejtag_ctrl;
 	int retries = RETRY_ATTEMPTS;
 
 	/* Handle the bigendian/littleendian */
@@ -277,7 +277,7 @@ begin_ejtag_dma_write_h:
 	do {
 		ejtag_ctrl = EJTAG_CTRL_DMAACC | ejtag_info->ejtag_ctrl;
 		mips_ejtag_drscan_32(ejtag_info, &ejtag_ctrl);
-	} while(ejtag_ctrl & EJTAG_CTRL_DSTRT);
+	} while (ejtag_ctrl & EJTAG_CTRL_DSTRT);
 
 	/* Clear DMA & Check DERR */
 	mips_ejtag_set_instr(ejtag_info, EJTAG_INST_CONTROL, NULL);
@@ -286,21 +286,21 @@ begin_ejtag_dma_write_h:
 	if (ejtag_ctrl  & EJTAG_CTRL_DERR)
 	{
 		if (retries--) {
-			LOG_ERROR("DMA Write Addr = %08x  Data = ERROR ON WRITE (retrying)\n", addr);
+			LOG_ERROR("DMA Write Addr = %08" PRIx32 "  Data = ERROR ON WRITE (retrying)\n", addr);
 			goto begin_ejtag_dma_write_h;
 		}
 		else
-			LOG_ERROR("DMA Write Addr = %08x  Data = ERROR ON WRITE\n", addr);
+			LOG_ERROR("DMA Write Addr = %08" PRIx32 "  Data = ERROR ON WRITE\n", addr);
 		return ERROR_JTAG_DEVICE_ERROR;
 	}
 
 	return ERROR_OK;
 }
 
-static int ejtag_dma_write_b(mips_ejtag_t *ejtag_info, u32 addr, u32 data)
+static int ejtag_dma_write_b(mips_ejtag_t *ejtag_info, uint32_t addr, uint32_t data)
 {
-	u32 v;
-	u32 ejtag_ctrl;
+	uint32_t v;
+	uint32_t ejtag_ctrl;
 	int retries = RETRY_ATTEMPTS;
 
 	/* Handle the bigendian/littleendian */
@@ -329,7 +329,7 @@ begin_ejtag_dma_write_b:
 	do {
 		ejtag_ctrl = EJTAG_CTRL_DMAACC | ejtag_info->ejtag_ctrl;
 		mips_ejtag_drscan_32(ejtag_info, &ejtag_ctrl);
-	} while(ejtag_ctrl & EJTAG_CTRL_DSTRT);
+	} while (ejtag_ctrl & EJTAG_CTRL_DSTRT);
 
 	/* Clear DMA & Check DERR */
 	mips_ejtag_set_instr(ejtag_info, EJTAG_INST_CONTROL, NULL);
@@ -338,119 +338,119 @@ begin_ejtag_dma_write_b:
 	if (ejtag_ctrl & EJTAG_CTRL_DERR)
 	{
 		if (retries--) {
-			LOG_ERROR("DMA Write Addr = %08x  Data = ERROR ON WRITE (retrying)\n", addr);
+			LOG_ERROR("DMA Write Addr = %08" PRIx32 "  Data = ERROR ON WRITE (retrying)\n", addr);
 			goto begin_ejtag_dma_write_b;
 		}
 		else
-			LOG_ERROR("DMA Write Addr = %08x  Data = ERROR ON WRITE\n", addr);
+			LOG_ERROR("DMA Write Addr = %08" PRIx32 "  Data = ERROR ON WRITE\n", addr);
 		return ERROR_JTAG_DEVICE_ERROR;
 	}
 
 	return ERROR_OK;
 }
 
-int mips32_dmaacc_read_mem(mips_ejtag_t *ejtag_info, u32 addr, int size, int count, void *buf)
+int mips32_dmaacc_read_mem(mips_ejtag_t *ejtag_info, uint32_t addr, int size, int count, void *buf)
 {
 	switch (size)
 	{
 		case 1:
 			return mips32_dmaacc_read_mem8(ejtag_info, addr, count, (uint8_t*)buf);
 		case 2:
-			return mips32_dmaacc_read_mem16(ejtag_info, addr, count, (u16*)buf);
+			return mips32_dmaacc_read_mem16(ejtag_info, addr, count, (uint16_t*)buf);
 		case 4:
-			return mips32_dmaacc_read_mem32(ejtag_info, addr, count, (u32*)buf);
+			return mips32_dmaacc_read_mem32(ejtag_info, addr, count, (uint32_t*)buf);
 	}
 
 	return ERROR_OK;
 }
 
-int mips32_dmaacc_read_mem32(mips_ejtag_t *ejtag_info, u32 addr, int count, u32 *buf)
+int mips32_dmaacc_read_mem32(mips_ejtag_t *ejtag_info, uint32_t addr, int count, uint32_t *buf)
 {
 	int i;
 	int	retval;
 
-	for (i=0; i<count; i++) {
-		if ((retval = ejtag_dma_read(ejtag_info, addr+i*sizeof(*buf), &buf[i])) != ERROR_OK)
+	for (i = 0; i < count; i++) {
+		if ((retval = ejtag_dma_read(ejtag_info, addr + i*sizeof(*buf), &buf[i])) != ERROR_OK)
 			return retval;
 	}
 
 	return ERROR_OK;
 }
 
-int mips32_dmaacc_read_mem16(mips_ejtag_t *ejtag_info, u32 addr, int count, u16 *buf)
+int mips32_dmaacc_read_mem16(mips_ejtag_t *ejtag_info, uint32_t addr, int count, uint16_t *buf)
 {
 	int i;
 	int retval;
 
-	for (i=0; i<count; i++) {
-		if ((retval = ejtag_dma_read_h(ejtag_info, addr+i*sizeof(*buf), &buf[i])) != ERROR_OK)
+	for (i = 0; i < count; i++) {
+		if ((retval = ejtag_dma_read_h(ejtag_info, addr + i*sizeof(*buf), &buf[i])) != ERROR_OK)
 			return retval;
 	}
 
 	return ERROR_OK;
 }
 
-int mips32_dmaacc_read_mem8(mips_ejtag_t *ejtag_info, u32 addr, int count, uint8_t *buf)
+int mips32_dmaacc_read_mem8(mips_ejtag_t *ejtag_info, uint32_t addr, int count, uint8_t *buf)
 {
 	int i;
 	int retval;
 
-	for (i=0; i<count; i++) {
-		if ((retval = ejtag_dma_read_b(ejtag_info, addr+i*sizeof(*buf), &buf[i])) != ERROR_OK)
+	for (i = 0; i < count; i++) {
+		if ((retval = ejtag_dma_read_b(ejtag_info, addr + i*sizeof(*buf), &buf[i])) != ERROR_OK)
 			return retval;
 	}
 
 	return ERROR_OK;
 }
 
-int mips32_dmaacc_write_mem(mips_ejtag_t *ejtag_info, u32 addr, int size, int count, void *buf)
+int mips32_dmaacc_write_mem(mips_ejtag_t *ejtag_info, uint32_t addr, int size, int count, void *buf)
 {
 	switch (size)
 	{
 		case 1:
 			return mips32_dmaacc_write_mem8(ejtag_info, addr, count, (uint8_t*)buf);
 		case 2:
-			return mips32_dmaacc_write_mem16(ejtag_info, addr, count,(u16*)buf);
+			return mips32_dmaacc_write_mem16(ejtag_info, addr, count,(uint16_t*)buf);
 		case 4:
-			return mips32_dmaacc_write_mem32(ejtag_info, addr, count, (u32*)buf);
+			return mips32_dmaacc_write_mem32(ejtag_info, addr, count, (uint32_t*)buf);
 	}
 
 	return ERROR_OK;
 }
 
-int mips32_dmaacc_write_mem32(mips_ejtag_t *ejtag_info, u32 addr, int count, u32 *buf)
+int mips32_dmaacc_write_mem32(mips_ejtag_t *ejtag_info, uint32_t addr, int count, uint32_t *buf)
 {
 	int i;
 	int retval;
 
-	for (i=0; i<count; i++) {
-		if ((retval = ejtag_dma_write(ejtag_info, addr+i*sizeof(*buf), buf[i])) != ERROR_OK)
+	for (i = 0; i < count; i++) {
+		if ((retval = ejtag_dma_write(ejtag_info, addr + i*sizeof(*buf), buf[i])) != ERROR_OK)
 			return retval;
 	}
 
 	return ERROR_OK;
 }
 
-int mips32_dmaacc_write_mem16(mips_ejtag_t *ejtag_info, u32 addr, int count, u16 *buf)
+int mips32_dmaacc_write_mem16(mips_ejtag_t *ejtag_info, uint32_t addr, int count, uint16_t *buf)
 {
 	int i;
 	int retval;
 
-	for (i=0; i<count; i++) {
-		if ((retval = ejtag_dma_write_h(ejtag_info, addr+i*sizeof(*buf), buf[i])) != ERROR_OK)
+	for (i = 0; i < count; i++) {
+		if ((retval = ejtag_dma_write_h(ejtag_info, addr + i*sizeof(*buf), buf[i])) != ERROR_OK)
 			return retval;
 	}
 
 	return ERROR_OK;
 }
 
-int mips32_dmaacc_write_mem8(mips_ejtag_t *ejtag_info, u32 addr, int count, uint8_t *buf)
+int mips32_dmaacc_write_mem8(mips_ejtag_t *ejtag_info, uint32_t addr, int count, uint8_t *buf)
 {
 	int i;
 	int retval;
 
-	for (i=0; i<count; i++) {
-		if ((retval = ejtag_dma_write_b(ejtag_info, addr+i*sizeof(*buf), buf[i])) != ERROR_OK)
+	for (i = 0; i < count; i++) {
+		if ((retval = ejtag_dma_write_b(ejtag_info, addr + i*sizeof(*buf), buf[i])) != ERROR_OK)
 			return retval;
 	}