X-Git-Url: https://git.sur5r.net/?a=blobdiff_plain;f=src%2Ftarget%2Fmips_ejtag.h;h=a7d5c5d788aa9cf513e3252d9128c867c61dbb79;hb=00fd07336e2bf99ad630c6c3a7a337b5f37df638;hp=f5d62c10dc070eebe5e45cc722091f9a7773261e;hpb=8f2c1659cf3d5a72ade3504caac248a0975aff2e;p=openocd

diff --git a/src/target/mips_ejtag.h b/src/target/mips_ejtag.h
index f5d62c10..a7d5c5d7 100644
--- a/src/target/mips_ejtag.h
+++ b/src/target/mips_ejtag.h
@@ -41,7 +41,7 @@
 #define EJTAG_INST_TCBDATA		0x12
 #define EJTAG_INST_BYPASS		0xFF
 
-/* debug control register bits */
+/* debug control register bits ECR */
 #define EJTAG_CTRL_TOF			(1 << 1)
 #define EJTAG_CTRL_TIF			(1 << 2)
 #define EJTAG_CTRL_BRKST		(1 << 3)
@@ -91,15 +91,23 @@
 #define EJTAG_IMP_NODMA			(1 << 14)
 #define EJTAG_IMP_MIPS16		(1 << 16)
 
+/* breakpoint support */
+#define EJTAG_DCR				0xFF300000
+#define EJTAG_IBS				0xFF301000
+#define EJTAG_IBA1				0xFF301100
+#define EJTAG_DBS				0xFF302000
+#define EJTAG_DBA1				0xFF302100
+
 typedef struct mips_ejtag_s
 {
-	int chain_pos;
+	jtag_tap_t *tap;
 	u32 impcode;
+	u32 idcode;
 	/*int use_dma;*/
 	u32 ejtag_ctrl;
 } mips_ejtag_t;
 
-extern int mips_ejtag_set_instr(mips_ejtag_t *ejtag_info, int new_instr, in_handler_t handler);
+extern int mips_ejtag_set_instr(mips_ejtag_t *ejtag_info, int new_instr, void *delete_me_and_submit_patch);
 extern int mips_ejtag_enter_debug(mips_ejtag_t *ejtag_info);
 extern int mips_ejtag_exit_debug(mips_ejtag_t *ejtag_info, int enable_interrupts);
 extern int mips_ejtag_get_impcode(mips_ejtag_t *ejtag_info, u32 *impcode, in_handler_t handler);