X-Git-Url: https://git.sur5r.net/?a=blobdiff_plain;f=src%2Ftarget%2Ftarget%2Fsam7x256.cfg;h=789f7dd69ca0caeb531765632002b306aeac25be;hb=7c0e823d0a57df99adc5b1b7975406bfd9e0d9fb;hp=d7e11ff32dfde08252148250451793ff37072661;hpb=e4218ebb8f7f5bf27578198e16ae5add99edeb75;p=openocd diff --git a/src/target/target/sam7x256.cfg b/src/target/target/sam7x256.cfg index d7e11ff3..789f7dd6 100644 --- a/src/target/target/sam7x256.cfg +++ b/src/target/target/sam7x256.cfg @@ -1,12 +1,30 @@ #use combined on interfaces or targets that can't set TRST/SRST separately reset_config srst_only srst_pulls_trst -#jtag scan chain -#format L IRC IRCM IDCODE (Length, IR Capture, IR Capture Mask, IDCODE) -jtag_device 4 0x1 0xf 0xe +if { [info exists CHIPNAME] } { + set _CHIPNAME $CHIPNAME +} else { + set _CHIPNAME sam7x256 +} + +if { [info exists ENDIAN] } { + set _ENDIAN $ENDIAN +} else { + set _ENDIAN little +} + +if { [info exists CPUTAPID ] } { + set _CPUTAPID $CPUTAPID +} else { + set _CPUTAPID 0x3f0f0f0f +} + +jtag newtap $_CHIPNAME cpu -irlen 4 -ircapture 0x1 -irmask 0xf -expected-id $_CPUTAPID + +set _TARGETNAME [format "%s.cpu" $_CHIPNAME] -target create target0 arm7tdmi -endian little -chain-position 0 -variant arm7tdmi -[new_target_name] configure -event reset-init { +target create $_TARGETNAME arm7tdmi -endian $_ENDIAN -chain-position $_TARGETNAME -variant arm7tdmi +$_TARGETNAME configure -event reset-init { # disable watchdog mww 0xfffffd44 0x00008000 # enable user reset @@ -25,10 +43,10 @@ target create target0 arm7tdmi -endian little -chain-position 0 -variant arm7tdm sleep 100 } -[new_target_name] configure -work-area-virt 0 -work-area-phys 0x00200000 -work-area-size 0x4000 -work-area-backup 0 +$_TARGETNAME configure -work-area-virt 0 -work-area-phys 0x00200000 -work-area-size 0x4000 -work-area-backup 0 -#flash bank -flash bank at91sam7 0 0 0 0 0 +#flash bank [ ] +flash bank at91sam7 0 0 0 0 0 0 0 0 0 0 0 0 18432 # For more information about the configuration files, take a look at: # openocd.texi