X-Git-Url: https://git.sur5r.net/?a=blobdiff_plain;f=src%2Ftarget%2Fxscale.c;h=c2b34931de57299751d02479e2c7cae1ff4fd392;hb=e232dea176cc8c831e77a10903120ff057337f6c;hp=e8a3e49fd0a0377cf9d1e439d3eefa9cfcd2e20c;hpb=dd9894f481d127266c201d7075ecbdd34b034124;p=openocd diff --git a/src/target/xscale.c b/src/target/xscale.c index e8a3e49f..c2b34931 100644 --- a/src/target/xscale.c +++ b/src/target/xscale.c @@ -833,7 +833,7 @@ static int xscale_update_vectors(struct target *target) static int xscale_arch_state(struct target *target) { struct xscale_common *xscale = target_to_xscale(target); - struct armv4_5_common_s *armv4_5 = &xscale->armv4_5_common; + struct arm *armv4_5 = &xscale->armv4_5_common; static const char *state[] = { @@ -911,7 +911,7 @@ static int xscale_poll(struct target *target) static int xscale_debug_entry(struct target *target) { struct xscale_common *xscale = target_to_xscale(target); - struct armv4_5_common_s *armv4_5 = &xscale->armv4_5_common; + struct arm *armv4_5 = &xscale->armv4_5_common; uint32_t pc; uint32_t buffer[10]; int i; @@ -1179,7 +1179,7 @@ static int xscale_resume(struct target *target, int current, uint32_t address, int handle_breakpoints, int debug_execution) { struct xscale_common *xscale = target_to_xscale(target); - struct armv4_5_common_s *armv4_5 = &xscale->armv4_5_common; + struct arm *armv4_5 = &xscale->armv4_5_common; struct breakpoint *breakpoint = target->breakpoints; uint32_t current_pc; int retval; @@ -1335,7 +1335,7 @@ static int xscale_step_inner(struct target *target, int current, uint32_t address, int handle_breakpoints) { struct xscale_common *xscale = target_to_xscale(target); - struct armv4_5_common_s *armv4_5 = &xscale->armv4_5_common; + struct arm *armv4_5 = &xscale->armv4_5_common; uint32_t next_pc; int retval; int i; @@ -1416,7 +1416,7 @@ static int xscale_step_inner(struct target *target, int current, static int xscale_step(struct target *target, int current, uint32_t address, int handle_breakpoints) { - struct armv4_5_common_s *armv4_5 = target_to_armv4_5(target); + struct arm *armv4_5 = target_to_armv4_5(target); struct breakpoint *breakpoint = target->breakpoints; uint32_t current_pc; @@ -1661,7 +1661,7 @@ static int xscale_write_core_reg(struct target *target, struct reg *r, static int xscale_full_context(struct target *target) { - struct armv4_5_common_s *armv4_5 = target_to_armv4_5(target); + struct arm *armv4_5 = target_to_armv4_5(target); uint32_t *buffer; @@ -1737,7 +1737,7 @@ static int xscale_full_context(struct target *target) static int xscale_restore_context(struct target *target) { - struct armv4_5_common_s *armv4_5 = target_to_armv4_5(target); + struct arm *armv4_5 = target_to_armv4_5(target); int i, j; @@ -2470,7 +2470,7 @@ static int xscale_write_dcsr_sw(struct target *target, uint32_t value) static int xscale_read_trace(struct target *target) { struct xscale_common *xscale = target_to_xscale(target); - struct armv4_5_common_s *armv4_5 = &xscale->armv4_5_common; + struct arm *armv4_5 = &xscale->armv4_5_common; struct xscale_trace_data **trace_data_p; /* 258 words from debug handler @@ -2821,7 +2821,7 @@ static const struct reg_arch_type xscale_reg_type = { static void xscale_build_reg_cache(struct target *target) { struct xscale_common *xscale = target_to_xscale(target); - struct armv4_5_common_s *armv4_5 = &xscale->armv4_5_common; + struct arm *armv4_5 = &xscale->armv4_5_common; struct reg_cache **cache_p = register_get_last_cache_p(&target->reg_cache); struct xscale_reg *arch_info = malloc(sizeof(xscale_reg_arch_info)); int i; @@ -3271,7 +3271,7 @@ COMMAND_HANDLER(xscale_handle_trace_buffer_command) { struct target *target = get_current_target(CMD_CTX); struct xscale_common *xscale = target_to_xscale(target); - struct armv4_5_common_s *armv4_5 = &xscale->armv4_5_common; + struct arm *armv4_5 = &xscale->armv4_5_common; uint32_t dcsr_value; int retval; @@ -3558,27 +3558,27 @@ static int xscale_register_commands(struct command_context *cmd_ctx) { struct command *xscale_cmd; - xscale_cmd = register_command(cmd_ctx, NULL, "xscale", NULL, COMMAND_ANY, "xscale specific commands"); + xscale_cmd = COMMAND_REGISTER(cmd_ctx, NULL, "xscale", NULL, COMMAND_ANY, "xscale specific commands"); - register_command(cmd_ctx, xscale_cmd, "debug_handler", xscale_handle_debug_handler_command, COMMAND_ANY, "'xscale debug_handler
' command takes two required operands"); - register_command(cmd_ctx, xscale_cmd, "cache_clean_address", xscale_handle_cache_clean_address_command, COMMAND_ANY, NULL); + COMMAND_REGISTER(cmd_ctx, xscale_cmd, "debug_handler", xscale_handle_debug_handler_command, COMMAND_ANY, "'xscale debug_handler
' command takes two required operands"); + COMMAND_REGISTER(cmd_ctx, xscale_cmd, "cache_clean_address", xscale_handle_cache_clean_address_command, COMMAND_ANY, NULL); - register_command(cmd_ctx, xscale_cmd, "cache_info", xscale_handle_cache_info_command, COMMAND_EXEC, NULL); - register_command(cmd_ctx, xscale_cmd, "mmu", xscale_handle_mmu_command, COMMAND_EXEC, "['enable'|'disable'] the MMU"); - register_command(cmd_ctx, xscale_cmd, "icache", xscale_handle_idcache_command, COMMAND_EXEC, "['enable'|'disable'] the ICache"); - register_command(cmd_ctx, xscale_cmd, "dcache", xscale_handle_idcache_command, COMMAND_EXEC, "['enable'|'disable'] the DCache"); + COMMAND_REGISTER(cmd_ctx, xscale_cmd, "cache_info", xscale_handle_cache_info_command, COMMAND_EXEC, NULL); + COMMAND_REGISTER(cmd_ctx, xscale_cmd, "mmu", xscale_handle_mmu_command, COMMAND_EXEC, "['enable'|'disable'] the MMU"); + COMMAND_REGISTER(cmd_ctx, xscale_cmd, "icache", xscale_handle_idcache_command, COMMAND_EXEC, "['enable'|'disable'] the ICache"); + COMMAND_REGISTER(cmd_ctx, xscale_cmd, "dcache", xscale_handle_idcache_command, COMMAND_EXEC, "['enable'|'disable'] the DCache"); - register_command(cmd_ctx, xscale_cmd, "vector_catch", xscale_handle_vector_catch_command, COMMAND_EXEC, " of vectors that should be catched"); - register_command(cmd_ctx, xscale_cmd, "vector_table", xscale_handle_vector_table_command, COMMAND_EXEC, " set static code for exception handler entry"); + COMMAND_REGISTER(cmd_ctx, xscale_cmd, "vector_catch", xscale_handle_vector_catch_command, COMMAND_EXEC, " of vectors that should be catched"); + COMMAND_REGISTER(cmd_ctx, xscale_cmd, "vector_table", xscale_handle_vector_table_command, COMMAND_EXEC, " set static code for exception handler entry"); - register_command(cmd_ctx, xscale_cmd, "trace_buffer", xscale_handle_trace_buffer_command, COMMAND_EXEC, " ['fill' [n]|'wrap']"); + COMMAND_REGISTER(cmd_ctx, xscale_cmd, "trace_buffer", xscale_handle_trace_buffer_command, COMMAND_EXEC, " ['fill' [n]|'wrap']"); - register_command(cmd_ctx, xscale_cmd, "dump_trace", xscale_handle_dump_trace_command, COMMAND_EXEC, "dump content of trace buffer to "); - register_command(cmd_ctx, xscale_cmd, "analyze_trace", xscale_handle_analyze_trace_buffer_command, COMMAND_EXEC, "analyze content of trace buffer"); - register_command(cmd_ctx, xscale_cmd, "trace_image", xscale_handle_trace_image_command, + COMMAND_REGISTER(cmd_ctx, xscale_cmd, "dump_trace", xscale_handle_dump_trace_command, COMMAND_EXEC, "dump content of trace buffer to "); + COMMAND_REGISTER(cmd_ctx, xscale_cmd, "analyze_trace", xscale_handle_analyze_trace_buffer_command, COMMAND_EXEC, "analyze content of trace buffer"); + COMMAND_REGISTER(cmd_ctx, xscale_cmd, "trace_image", xscale_handle_trace_image_command, COMMAND_EXEC, "load image from [base address]"); - register_command(cmd_ctx, xscale_cmd, "cp15", xscale_handle_cp15, COMMAND_EXEC, "access coproc 15 [value]"); + COMMAND_REGISTER(cmd_ctx, xscale_cmd, "cp15", xscale_handle_cp15, COMMAND_EXEC, "access coproc 15 [value]"); armv4_5_register_commands(cmd_ctx);