X-Git-Url: https://git.sur5r.net/?a=blobdiff_plain;f=tcl%2Fboard%2Fpxa255_sst.cfg;h=ce9038710e0ec190fa9d1ab2f6bbf2a40463fcc3;hb=7b77b3c5d1a20793cc2057a96e67d8f7ca20e4cb;hp=d9f6187b9ee9be19ba623834b4bb7c292b183271;hpb=71af49ca7fb11b0bd0c1ba9578826f49288b68ef;p=openocd

diff --git a/tcl/board/pxa255_sst.cfg b/tcl/board/pxa255_sst.cfg
index d9f6187b..ce903871 100644
--- a/tcl/board/pxa255_sst.cfg
+++ b/tcl/board/pxa255_sst.cfg
@@ -10,10 +10,11 @@
 source [find target/pxa255.cfg]
 
 # Target name is set by above
-$_TARGETNAME configure -work-area-virt 0 -work-area-phys 0x4000000 -work-area-size 0x4000 -work-area-backup 0
+$_TARGETNAME configure -work-area-phys 0x4000000 -work-area-size 0x4000 -work-area-backup 0
 
 # flash bank <driver> <base> <size> <chip_width> <bus_width> <target> [options]
-flash bank cfi 0x00000000 0x80000 2 2 $_TARGETNAME jedec_probe
+set _FLASHNAME $_CHIPNAME.flash
+flash bank $_FLASHNAME cfi 0x00000000 0x80000 2 2 $_TARGETNAME jedec_probe
 
 proc pxa255_sst_init {} {
 	xscale cp15   15      0x00002001  #Enable CP0 and CP13 access