X-Git-Url: https://git.sur5r.net/?a=blobdiff_plain;f=tcl%2Ftarget%2Fat91sam9260.cfg;h=86258c62fbd060894952ad573f59ccc9f97de006;hb=00635e28ba5c405742cae261d8551f165dc78ba3;hp=862633ac84681eee30f1cd51b61f3bc08be0428a;hpb=14f2189e1ae51a395d4136dd991fb1a6c2ed42b2;p=openocd

diff --git a/tcl/target/at91sam9260.cfg b/tcl/target/at91sam9260.cfg
index 862633ac..86258c62 100644
--- a/tcl/target/at91sam9260.cfg
+++ b/tcl/target/at91sam9260.cfg
@@ -2,15 +2,15 @@
 # Target:    Atmel AT91SAM9260
 ######################################
 
-if { [info exists CHIPNAME] } {	
-   set  _CHIPNAME $CHIPNAME    
-} else {	 
+if { [info exists CHIPNAME] } {
+   set  _CHIPNAME $CHIPNAME
+} else {
    set  _CHIPNAME at91sam9260
 }
 
-if { [info exists ENDIAN] } {	
-   set  _ENDIAN $ENDIAN    
-} else {	 
+if { [info exists ENDIAN] } {
+   set  _ENDIAN $ENDIAN
+} else {
    set  _ENDIAN little
 }
 
@@ -26,7 +26,7 @@ reset_config trst_and_srst separate trst_push_pull srst_open_drain
 #
 jtag newtap $_CHIPNAME cpu -irlen 4 -ircapture 0x1 -irmask 0xf -expected-id $_CPUTAPID
 
-jtag_nsrst_delay 300
+adapter_nsrst_delay 300
 jtag_ntrst_delay 200
 
 jtag_rclk 3
@@ -35,10 +35,10 @@ jtag_rclk 3
 # Target configuration
 ######################
 
-set _TARGETNAME [format "%s.cpu" $_CHIPNAME]
+set _TARGETNAME $_CHIPNAME.cpu
 target create $_TARGETNAME arm926ejs -endian $_ENDIAN -chain-position $_TARGETNAME -variant arm926ejs
 
 # Internal sram1 memory
-$_TARGETNAME configure -work-area-virt 0 -work-area-phys 0x00300000 -work-area-size 0x1000 -work-area-backup 1
+$_TARGETNAME configure -work-area-phys 0x00300000 -work-area-size 0x1000 -work-area-backup 1