X-Git-Url: https://git.sur5r.net/?a=blobdiff_plain;f=tcl%2Ftarget%2Ficepick.cfg;h=abd7b6a084db6c5468edc49db3acffcaf97241c1;hb=b1f3e89970f352d5b340f80a216dcef65691bc58;hp=36ffc022c6f7f0bda2979294a2556c22dfc3cacb;hpb=c32f81f7186ac825652df4226646b3505b01f940;p=openocd

diff --git a/tcl/target/icepick.cfg b/tcl/target/icepick.cfg
index 36ffc022..abd7b6a0 100644
--- a/tcl/target/icepick.cfg
+++ b/tcl/target/icepick.cfg
@@ -107,11 +107,17 @@ proc icepick_c_tapenable {jrc port} {
 	runtest 10
 }
 
+# jrc	== TAP name for the ICEpick
+# coreid== core id number 0..15 (not same as port number!)
+proc icepick_d_set_coreid {jrc coreid } {
+	icepick_c_router $jrc 1 0x6 $coreid 0x2008
+}
+
 # jrc	== TAP name for the ICEpick
 # port	== a port number, 0..15
 # Follow the sequence described in
 # http://processors.wiki.ti.com/images/f/f6/Router_Scan_Sequence-ICEpick-D.pdf
-proc icepick_d_tapenable {jrc port} {
+proc icepick_d_tapenable {jrc port coreid} {
 	# First CONNECT to the ICEPick
 	icepick_c_connect $jrc
 	icepick_c_setup $jrc
@@ -120,8 +126,7 @@ proc icepick_d_tapenable {jrc port} {
 	icepick_c_router $jrc 1 0x2 $port 0x2108
 
 	# Set 4 bit core ID to the Cortex-A
-	irscan $jrc [CONST IR_ROUTER] -endstate IRPAUSE
-	drscan $jrc 32 0xe0002008 -endstate DRPAUSE
+	icepick_d_set_coreid $jrc $coreid
 
 	# Enter the bypass state
 	irscan $jrc [CONST IF_BYPASS] -endstate RUN/IDLE