X-Git-Url: https://git.sur5r.net/?a=blobdiff_plain;f=tcl%2Ftarget%2Flpc4350.cfg;h=6614383b89dff72a0e71f3f1ee2e1d9c9f075dcb;hb=2ce4e31bbcfabc06b7ac71d2e507e707d293c5c0;hp=63d130796a773d792f4c9cfdbb68dccc735e5788;hpb=4be685c6167e8ac340cd383f0a0a61faaa45f3f8;p=openocd

diff --git a/tcl/target/lpc4350.cfg b/tcl/target/lpc4350.cfg
index 63d13079..6614383b 100644
--- a/tcl/target/lpc4350.cfg
+++ b/tcl/target/lpc4350.cfg
@@ -42,3 +42,7 @@ jtag newtap $_CHIPNAME m0 -irlen 4 -ircapture 0x1 -irmask 0xf \
 
 target create $_CHIPNAME.m4 cortex_m3 -chain-position $_CHIPNAME.m4
 target create $_CHIPNAME.m0 cortex_m3 -chain-position $_CHIPNAME.m0
+
+# if srst is not fitted use SYSRESETREQ to
+# perform a soft reset
+cortex_m3 reset_config sysresetreq