X-Git-Url: https://git.sur5r.net/?a=blobdiff_plain;f=tcl%2Ftarget%2Fstr710.cfg;h=0f61d4438dae228969c6613167e099668bc57a43;hb=28e6dcee85ffdc5af0c630b0aca4e2087d95bca9;hp=8e5d36f0038533950ec7a99bcb7be39e13533ca9;hpb=3e6f9e8d1e65c4da505ff78481d54a115520d3d1;p=openocd

diff --git a/tcl/target/str710.cfg b/tcl/target/str710.cfg
index 8e5d36f0..0f61d443 100644
--- a/tcl/target/str710.cfg
+++ b/tcl/target/str710.cfg
@@ -1,5 +1,5 @@
 #start slow, speed up after reset
-jtag_khz 10
+adapter_khz 10
 
 if { [info exists CHIPNAME] } {
    set  _CHIPNAME $CHIPNAME
@@ -29,8 +29,16 @@ jtag newtap $_CHIPNAME cpu -irlen 4 -ircapture 0x1 -irmask 0x0f -expected-id $_C
 set _TARGETNAME $_CHIPNAME.cpu
 target create $_TARGETNAME arm7tdmi -endian $_ENDIAN -chain-position $_TARGETNAME -variant arm7tdmi
 
-$_TARGETNAME configure -event reset-start { jtag_khz 10 }
-$_TARGETNAME configure -event reset-init { jtag_khz 6000 }
+$_TARGETNAME configure -event reset-start { adapter_khz 10 }
+$_TARGETNAME configure -event reset-init {
+	adapter_khz 6000
+
+# Because the hardware cannot be interrogated for the protection state
+# of sectors, initialize all the sectors to be unprotected. The initial
+# state is reflected by the driver, too.
+	flash protect 0 0 last off
+	flash protect 1 0 last off
+}
 $_TARGETNAME configure -event gdb-flash-erase-start {
 	flash protect 0 0 7 off
 	flash protect 1 0 1 off
@@ -39,8 +47,7 @@ $_TARGETNAME configure -event gdb-flash-erase-start {
 $_TARGETNAME configure -work-area-phys 0x2000C000 -work-area-size 0x4000 -work-area-backup 0
 
 #flash bank str7x <base> <size> 0 0 <target#> <variant>
-flash bank str7x 0x40000000 0x00040000 0 0 0 STR71x
-flash bank str7x 0x400C0000 0x00004000 0 0 0 STR71x
-
-# For more information about the configuration files, take a look at:
-# openocd.texi
+set _FLASHNAME $_CHIPNAME.flash0
+flash bank $_FLASHNAME str7x 0x40000000 0x00040000 0 0 $_TARGETNAME STR71x
+set _FLASHNAME $_CHIPNAME.flash1
+flash bank $_FLASHNAME str7x 0x400C0000 0x00004000 0 0 $_TARGETNAME STR71x