X-Git-Url: https://git.sur5r.net/?a=blobdiff_plain;f=tcl%2Ftarget%2Fstr750.cfg;h=7d9f0343d105dfd9117f0382664fdc9711175a1e;hb=00635e28ba5c405742cae261d8551f165dc78ba3;hp=5df968bfc146e3918082abf77a66816b9afd4765;hpb=3616b93eee128b0c12fa0d453fbe6ced998e482f;p=openocd diff --git a/tcl/target/str750.cfg b/tcl/target/str750.cfg index 5df968bf..7d9f0343 100644 --- a/tcl/target/str750.cfg +++ b/tcl/target/str750.cfg @@ -19,7 +19,7 @@ if { [info exists CPUTAPID] } { } # jtag speed -jtag_khz 10 +adapter_khz 10 #use combined on interfaces or targets that can't set TRST/SRST separately reset_config trst_and_srst srst_pulls_trst @@ -29,14 +29,22 @@ reset_config trst_and_srst srst_pulls_trst jtag newtap $_CHIPNAME cpu -irlen 4 -ircapture 0x1 -irmask 0x0f -expected-id $_CPUTAPID #jtag nTRST and nSRST delay -jtag_nsrst_delay 500 +adapter_nsrst_delay 500 jtag_ntrst_delay 500 set _TARGETNAME $_CHIPNAME.cpu target create $_TARGETNAME arm7tdmi -endian little -chain-position 0 -variant arm7tdmi -$_TARGETNAME configure -event reset-start { jtag_khz 10 } -$_TARGETNAME configure -event reset-init { jtag_khz 3000 } +$_TARGETNAME configure -event reset-start { adapter_khz 10 } +$_TARGETNAME configure -event reset-init { + adapter_khz 3000 + +# Because the hardware cannot be interrogated for the protection state +# of sectors, initialize all the sectors to be unprotected. The initial +# state is reflected by the driver, too. + flash protect 0 0 last off + flash protect 1 0 last off +} $_TARGETNAME configure -event gdb-flash-erase-start { flash protect 0 0 7 off flash protect 1 0 1 off @@ -45,8 +53,8 @@ $_TARGETNAME configure -event gdb-flash-erase-start { $_TARGETNAME configure -work-area-phys 0x40000000 -work-area-size 0x4000 -work-area-backup 0 #flash bank -set _FLASHNAME $_CHIPNAME.flash +set _FLASHNAME $_CHIPNAME.flash0 flash bank $_FLASHNAME str7x 0x20000000 0x00040000 0 0 $_TARGETNAME STR75x -set _FLASHNAME $_CHIPNAME.flash +set _FLASHNAME $_CHIPNAME.flash1 flash bank $_FLASHNAME str7x 0x200C0000 0x00004000 0 0 $_TARGETNAME STR75x