X-Git-Url: https://git.sur5r.net/?a=blobdiff_plain;f=tcl%2Ftarget%2Ftmpa900.cfg;h=a5513915a169796b16fe2e6462372a2c8800278f;hb=82f44a4708cdfdf2bf4b386a4751e6b43adad2b2;hp=719c9769ab916a5a1ae9343434555131781f8b22;hpb=32599fab1ac1f77b8f64fde0cd7668bd0f5f1c50;p=openocd

diff --git a/tcl/target/tmpa900.cfg b/tcl/target/tmpa900.cfg
index 719c9769..a5513915 100644
--- a/tcl/target/tmpa900.cfg
+++ b/tcl/target/tmpa900.cfg
@@ -32,15 +32,15 @@ jtag newtap $_CHIPNAME cpu -irlen 4 -ircapture 0x1 -irmask 0xf -expected-id $_CP
 
 #use combined on interfaces or targets that can't set TRST/SRST separately
 reset_config trst_and_srst
-jtag_nsrst_delay 20
+adapter_nsrst_delay 20
 jtag_ntrst_delay 20
 
 ######################
 # Target configuration
 ######################
 
-set _TARGETNAME [format "%s.cpu" $_CHIPNAME]
-target create $_TARGETNAME arm926ejs -endian $_ENDIAN -chain-position $_TARGETNAME -variant arm926ejs
+set _TARGETNAME $_CHIPNAME.cpu
+target create $_TARGETNAME arm926ejs -endian $_ENDIAN -chain-position $_TARGETNAME
 
 # built-in RAM0
 #working_area 0 0xf8004000 0x4000 nobackup
@@ -52,5 +52,5 @@ target create $_TARGETNAME arm926ejs -endian $_ENDIAN -chain-position $_TARGETNA
 #working_area 0 0xf8004000 0xc000 nobackup
 
 # Internal sram1 memory
-$_TARGETNAME configure -work-area-virt 0 -work-area-phys 0xf8004000 -work-area-size 0x8000 \
+$_TARGETNAME configure -work-area-phys 0xf8004000 -work-area-size 0x8000 \
 -work-area-backup 0