X-Git-Url: https://git.sur5r.net/?a=blobdiff_plain;f=tools%2Fimximage.c;h=5f63bf875945b9b8ddc850a6cb0736cbe1413165;hb=db405d1980e0e3bfdd629399d1dfe457f1f32646;hp=0c43196ac1953ececd3a0161191d17f481f20703;hpb=43ade93bdb0c8bd57382be810a05b3793749ce85;p=u-boot

diff --git a/tools/imximage.c b/tools/imximage.c
index 0c43196ac1..5f63bf8759 100644
--- a/tools/imximage.c
+++ b/tools/imximage.c
@@ -1,3 +1,4 @@
+// SPDX-License-Identifier: GPL-2.0+
 /*
  * (C) Copyright 2009
  * Stefano Babic, DENX Software Engineering, sbabic@denx.de.
@@ -5,8 +6,6 @@
  * (C) Copyright 2008
  * Marvell Semiconductor <www.marvell.com>
  * Written-by: Prafulla Wadaskar <prafulla@marvell.com>
- *
- * SPDX-License-Identifier:	GPL-2.0+
  */
 
 #include "imagetool.h"
@@ -23,6 +22,7 @@ static table_entry_t imximage_cmds[] = {
 	{CMD_BOOT_OFFSET,       "BOOT_OFFSET",          "Boot offset",	  },
 	{CMD_WRITE_DATA,        "DATA",                 "Reg Write Data", },
 	{CMD_WRITE_CLR_BIT,     "CLR_BIT",              "Reg clear bit",  },
+	{CMD_WRITE_SET_BIT,     "SET_BIT",              "Reg set bit",  },
 	{CMD_CHECK_BITS_SET,    "CHECK_BITS_SET",   "Reg Check bits set", },
 	{CMD_CHECK_BITS_CLR,    "CHECK_BITS_CLR",   "Reg Check bits clr", },
 	{CMD_CSF,               "CSF",           "Command Sequence File", },
@@ -204,6 +204,15 @@ static void set_dcd_param_v2(struct imx_header *imxhdr, uint32_t dcd_len,
 		d->write_dcd_command.length = cpu_to_be16(4);
 		d->write_dcd_command.param = DCD_WRITE_CLR_BIT_PARAM;
 		break;
+	case CMD_WRITE_SET_BIT:
+		if ((d->write_dcd_command.tag == DCD_WRITE_DATA_COMMAND_TAG) &&
+		    (d->write_dcd_command.param == DCD_WRITE_SET_BIT_PARAM))
+			break;
+		d = d2;
+		d->write_dcd_command.tag = DCD_WRITE_DATA_COMMAND_TAG;
+		d->write_dcd_command.length = cpu_to_be16(4);
+		d->write_dcd_command.param = DCD_WRITE_SET_BIT_PARAM;
+		break;
 	/*
 	 * Check data command only supports one entry,
 	 */
@@ -506,11 +515,11 @@ static void print_hdr_v2(struct imx_header *imx_hdr)
 			offs = (char *)&hdr_v2->data.dcd_table
 				- (char *)hdr_v2;
 
-			printf("HAB Blocks:   %08x %08x %08x\n",
+			printf("HAB Blocks:   0x%08x 0x%08x 0x%08x\n",
 			       (uint32_t)fhdr_v2->self, 0,
 			       hdr_v2->boot_data.size - imximage_ivt_offset -
 			       imximage_csf_size);
-			printf("DCD Blocks:   00910000 %08x %08x\n",
+			printf("DCD Blocks:   0x00910000 0x%08x 0x%08x\n",
 			       offs, be16_to_cpu(dcdlen));
 		}
 	} else {
@@ -636,6 +645,7 @@ static void parse_cfg_cmd(struct imx_header *imxhdr, int32_t cmd, char *token,
 		break;
 	case CMD_WRITE_DATA:
 	case CMD_WRITE_CLR_BIT:
+	case CMD_WRITE_SET_BIT:
 	case CMD_CHECK_BITS_SET:
 	case CMD_CHECK_BITS_CLR:
 		value = get_cfg_value(token, name, lineno);
@@ -686,6 +696,7 @@ static void parse_cfg_fld(struct imx_header *imxhdr, int32_t *cmd,
 		switch(*cmd) {
 		case CMD_WRITE_DATA:
 		case CMD_WRITE_CLR_BIT:
+		case CMD_WRITE_SET_BIT:
 		case CMD_CHECK_BITS_SET:
 		case CMD_CHECK_BITS_CLR: