X-Git-Url: https://git.sur5r.net/?a=blobdiff_plain;f=tools%2Fimximage.h;h=db8b9a3dd487455d01eb0d25b2efb49e83f8b27b;hb=576a085c1d224b8a5a3ccf5c4114d07a1f695f20;hp=36fe0958fee3023763b8fb4860d5c1fe98c69616;hpb=e1cc4d31f889428a4ca73120951389c756404184;p=u-boot diff --git a/tools/imximage.h b/tools/imximage.h index 36fe0958fe..db8b9a3dd4 100644 --- a/tools/imximage.h +++ b/tools/imximage.h @@ -9,6 +9,7 @@ #define _IMXIMAGE_H_ #define MAX_HW_CFG_SIZE_V2 220 /* Max number of registers imx can set for v2 */ +#define MAX_PLUGIN_CODE_SIZE (64 * 1024) #define MAX_HW_CFG_SIZE_V1 60 /* Max number of registers imx can set for v1 */ #define APP_CODE_BARKER 0xB1 #define DCD_BARKER 0xB17219E9 @@ -42,20 +43,29 @@ #define FLASH_LOADSIZE_SATA FLASH_LOADSIZE_STANDARD #define FLASH_LOADSIZE_QSPI 0x0 /* entire image */ -#define IVT_HEADER_TAG 0xD1 -#define IVT_VERSION 0x40 -#define DCD_HEADER_TAG 0xD2 -#define DCD_COMMAND_TAG 0xCC -#define DCD_VERSION 0x40 -#define DCD_COMMAND_PARAM 0x4 +/* Command tags and parameters */ +#define IVT_HEADER_TAG 0xD1 +#define IVT_VERSION 0x40 +#define DCD_HEADER_TAG 0xD2 +#define DCD_VERSION 0x40 +#define DCD_WRITE_DATA_COMMAND_TAG 0xCC +#define DCD_WRITE_DATA_PARAM 0x4 +#define DCD_WRITE_CLR_BIT_PARAM 0xC +#define DCD_CHECK_DATA_COMMAND_TAG 0xCF +#define DCD_CHECK_BITS_SET_PARAM 0x14 +#define DCD_CHECK_BITS_CLR_PARAM 0x04 enum imximage_cmd { CMD_INVALID, CMD_IMAGE_VERSION, CMD_BOOT_FROM, CMD_BOOT_OFFSET, - CMD_DATA, + CMD_WRITE_DATA, + CMD_WRITE_CLR_BIT, + CMD_CHECK_BITS_SET, + CMD_CHECK_BITS_CLR, CMD_CSF, + CMD_PLUGIN, }; enum imximage_fld_types { @@ -125,10 +135,15 @@ typedef struct { uint8_t param; } __attribute__((packed)) write_dcd_command_t; -typedef struct { - ivt_header_t header; +struct dcd_v2_cmd { write_dcd_command_t write_dcd_command; dcd_addr_data_t addr_data[MAX_HW_CFG_SIZE_V2]; +}; + +typedef struct { + ivt_header_t header; + struct dcd_v2_cmd dcd_cmd; + uint32_t padding[1]; /* end up on an 8-byte boundary */ } dcd_v2_t; typedef struct { @@ -151,7 +166,10 @@ typedef struct { typedef struct { flash_header_v2_t fhdr; boot_data_t boot_data; - dcd_v2_t dcd_table; + union { + dcd_v2_t dcd_table; + char plugin_code[MAX_PLUGIN_CODE_SIZE]; + } data; } imx_header_v2_t; /* The header must be aligned to 4k on MX53 for NAND boot */ @@ -167,6 +185,9 @@ typedef void (*set_dcd_val_t)(struct imx_header *imxhdr, int fld, uint32_t value, uint32_t off); +typedef void (*set_dcd_param_t)(struct imx_header *imxhdr, uint32_t dcd_len, + int32_t cmd); + typedef void (*set_dcd_rst_t)(struct imx_header *imxhdr, uint32_t dcd_len, char *name, int lineno);