X-Git-Url: https://git.sur5r.net/?a=blobdiff_plain;f=tools%2Fmxsboot.c;h=3434c81792cbcb4827849c87a2f83acd22e8330d;hb=f4e6ec7dc6fcfbad7742c27752262f38844683a2;hp=90b21737b92f80bba2a78e41bb066dd40724ff94;hpb=c4a7ece02046f647019cc0aaddf530833a8db29c;p=u-boot

diff --git a/tools/mxsboot.c b/tools/mxsboot.c
index 90b21737b9..3434c81792 100644
--- a/tools/mxsboot.c
+++ b/tools/mxsboot.c
@@ -7,6 +7,7 @@
  * SPDX-License-Identifier:	GPL-2.0+
  */
 
+#include <endian.h>
 #include <fcntl.h>
 #include <sys/stat.h>
 #include <sys/types.h>
@@ -14,6 +15,10 @@
 
 #include "compiler.h"
 
+/* Taken from <linux/kernel.h> */
+#define __round_mask(x, y) ((__typeof__(x))((y)-1))
+#define round_down(x, y) ((x) & ~__round_mask(x, y))
+
 /*
  * Default BCB layout.
  *
@@ -48,6 +53,7 @@ static uint32_t sd_sector = 2048;
 #define	MXS_NAND_DMA_DESCRIPTOR_COUNT		4
 #define	MXS_NAND_CHUNK_DATA_CHUNK_SIZE		512
 #define	MXS_NAND_METADATA_SIZE			10
+#define	MXS_NAND_BITS_PER_ECC_LEVEL		13
 #define	MXS_NAND_COMMAND_BUFFER_SIZE		32
 
 struct mx28_nand_fcb {
@@ -125,26 +131,34 @@ struct mx28_sd_config_block {
 	struct mx28_sd_drive_info	drv_info[1];
 };
 
+static inline uint32_t mx28_nand_ecc_chunk_cnt(uint32_t page_data_size)
+{
+	return page_data_size / MXS_NAND_CHUNK_DATA_CHUNK_SIZE;
+}
+
 static inline uint32_t mx28_nand_ecc_size_in_bits(uint32_t ecc_strength)
 {
-	return ecc_strength * 13;
+	return ecc_strength * MXS_NAND_BITS_PER_ECC_LEVEL;
 }
 
 static inline uint32_t mx28_nand_get_ecc_strength(uint32_t page_data_size,
 						uint32_t page_oob_size)
 {
-	if (page_data_size == 2048)
-		return 8;
-
-	if (page_data_size == 4096) {
-		if (page_oob_size == 128)
-			return 8;
+	int ecc_strength;
 
-		if (page_oob_size == 218)
-			return 16;
-	}
+	/*
+	 * Determine the ECC layout with the formula:
+	 *	ECC bits per chunk = (total page spare data bits) /
+	 *		(bits per ECC level) / (chunks per page)
+	 * where:
+	 *	total page spare data bits =
+	 *		(page oob size - meta data size) * (bits per byte)
+	 */
+	ecc_strength = ((page_oob_size - MXS_NAND_METADATA_SIZE) * 8)
+			/ (MXS_NAND_BITS_PER_ECC_LEVEL *
+				mx28_nand_ecc_chunk_cnt(page_data_size));
 
-	return 0;
+	return round_down(ecc_strength, 2);
 }
 
 static inline uint32_t mx28_nand_get_mark_offset(uint32_t page_data_size,
@@ -258,20 +272,10 @@ static struct mx28_nand_fcb *mx28_nand_get_fcb(uint32_t size)
 	fcb->ecc_block_0_size =		512;
 	fcb->ecc_block_n_size =		512;
 	fcb->metadata_bytes =		10;
-
-	if (nand_writesize == 2048) {
-		fcb->ecc_block_n_ecc_type =		4;
-		fcb->ecc_block_0_ecc_type =		4;
-	} else if (nand_writesize == 4096) {
-		if (nand_oobsize == 128) {
-			fcb->ecc_block_n_ecc_type =	4;
-			fcb->ecc_block_0_ecc_type =	4;
-		} else if (nand_oobsize == 218) {
-			fcb->ecc_block_n_ecc_type =	8;
-			fcb->ecc_block_0_ecc_type =	8;
-		}
-	}
-
+	fcb->ecc_block_n_ecc_type = mx28_nand_get_ecc_strength(
+					nand_writesize, nand_oobsize) >> 1;
+	fcb->ecc_block_0_ecc_type = mx28_nand_get_ecc_strength(
+					nand_writesize, nand_oobsize) >> 1;
 	if (fcb->ecc_block_n_ecc_type == 0) {
 		printf("MX28 NAND: Unsupported NAND geometry\n");
 		goto err;
@@ -553,15 +557,15 @@ static int mx28_create_sd_image(int infd, int outfd)
 
 	cb = (struct mx28_sd_config_block *)buf;
 
-	cb->signature = 0x00112233;
-	cb->primary_boot_tag = 0x1;
-	cb->secondary_boot_tag = 0x1;
-	cb->num_copies = 1;
-	cb->drv_info[0].chip_num = 0x0;
-	cb->drv_info[0].drive_type = 0x0;
-	cb->drv_info[0].tag = 0x1;
-	cb->drv_info[0].first_sector_number = sd_sector + 4;
-	cb->drv_info[0].sector_count = (size - 4) / 512;
+	cb->signature = htole32(0x00112233);
+	cb->primary_boot_tag = htole32(0x1);
+	cb->secondary_boot_tag = htole32(0x1);
+	cb->num_copies = htole32(1);
+	cb->drv_info[0].chip_num = htole32(0x0);
+	cb->drv_info[0].drive_type = htole32(0x0);
+	cb->drv_info[0].tag = htole32(0x1);
+	cb->drv_info[0].first_sector_number = htole32(sd_sector + 4);
+	cb->drv_info[0].sector_count = htole32((size - 4) / 512);
 
 	wr_size = write(outfd, buf, size);
 	if (wr_size != size) {