git.sur5r.net Git - openocd/commit

]> git.sur5r.net Git - openocd/commit

author	drath <drath@b42882b7-edfa-0310-969c-e2dbd0fdcd60>
	Sun, 30 Jul 2006 11:25:43 +0000 (11:25 +0000)
committer	drath <drath@b42882b7-edfa-0310-969c-e2dbd0fdcd60>
	Sun, 30 Jul 2006 11:25:43 +0000 (11:25 +0000)
commit	1341eb3b0aea74b939a5d7702f696b175d032647
tree	66aec1f947ef1b464b2f1e9028e8e4846499ad31	tree \| snapshot
parent	82d2633b5f550115e9e7c7d0520babb6680aa38f	commit \| diff

- added configurable delays after reset lines get deasserted. useful if reset circuitry keeps lines asserted for too long.
- additional debug output when opening the parallel port
- fixed counting of available arm7/9 watchpoint units
- 'flash write' now displays elapsed time

git-svn-id: svn://svn.berlios.de/openocd/trunk@79 b42882b7-edfa-0310-969c-e2dbd0fdcd60

src/flash/flash.c		diff \| blob \| history
src/jtag/jtag.c		diff \| blob \| history
src/jtag/jtag.h		diff \| blob \| history
src/jtag/parport.c		diff \| blob \| history
src/openocd.c		diff \| blob \| history
src/target/arm7_9_common.c		diff \| blob \| history

Cloned from https://git.code.sf.net/p/openocd/code

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