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(parent: 3341a29) | patch
Add trap handler to RISC-V port so there is no dependency on third party code.
authorrtel <rtel@1d2547de-c912-0410-9cb9-b8ca96c0e9e2>
Sun, 23 Sep 2018 03:52:23 +0000 (03:52 +0000)
committerrtel <rtel@1d2547de-c912-0410-9cb9-b8ca96c0e9e2>
Sun, 23 Sep 2018 03:52:23 +0000 (03:52 +0000)
commit408a95f9c9e3b94514d761e1a1499654a3f91439
treeee84c020af0cee84245c7aef1c7bf034e958f0e1tree | snapshot
parent3341a29bfc974113e126cbf374cc52282627c898commit | diff
Add trap handler to RISC-V port so there is no dependency on third party code.

git-svn-id: https://svn.code.sf.net/p/freertos/code/trunk@2584 1d2547de-c912-0410-9cb9-b8ca96c0e9e2
FreeRTOS/Source/portable/GCC/RISC-V-RV32/port.c diff | blob | history
FreeRTOS/Source/portable/GCC/RISC-V-RV32/portASM.S [new file with mode: 0644] blob
FreeRTOS imported from SF.net SVN