]> git.sur5r.net Git - freertos/commit
Re-org of RISC-V file structure and naming step 1.
authorrtel <rtel@1d2547de-c912-0410-9cb9-b8ca96c0e9e2>
Sun, 30 Dec 2018 23:20:26 +0000 (23:20 +0000)
committerrtel <rtel@1d2547de-c912-0410-9cb9-b8ca96c0e9e2>
Sun, 30 Dec 2018 23:20:26 +0000 (23:20 +0000)
commit8ac2c5cb01b2c5eb89d49528dcc4aefbbcb71d03
tree9fcd2861e993462707de7b900deca0548d8a2109
parent6645a15c6cbc43694b758ffa9ca7380c74660119
Re-org of RISC-V file structure and naming step 1.

git-svn-id: https://svn.code.sf.net/p/freertos/code/trunk@2619 1d2547de-c912-0410-9cb9-b8ca96c0e9e2
FreeRTOS/Source/portable/GCC/RISC-V-RV32/CLINT_no_extensions/freertos_risc_v_port_specific_extensions.h [deleted file]
FreeRTOS/Source/portable/GCC/RISC-V-RV32/Pulpino_Vega_RV32M1RM/freertos_risc_v_port_specific_extensions.h [deleted file]
FreeRTOS/Source/portable/GCC/RISC-V-RV32/chip_specific_extensions/Pulpino_Vega_RV32M1RM/freertos_risc_v_port_specific_extensions.h [new file with mode: 0644]
FreeRTOS/Source/portable/GCC/RISC-V-RV32/freertos_risc_v_port_specific_extensions.h [new file with mode: 0644]
FreeRTOS/Source/portable/GCC/RISC-V-RV32/readme.txt [new file with mode: 0644]