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(parent: 79c4c22) | patch
aarch64: fix mode switching
authorMatthias Welwarsky <matthias.welwarsky@sysgo.com>
Thu, 20 Oct 2016 09:31:40 +0000 (11:31 +0200)
committerMatthias Welwarsky <matthias.welwarsky@sysgo.com>
Fri, 10 Feb 2017 13:18:34 +0000 (14:18 +0100)
commit946958cb723f0b123505234275ce9a653ddbfbd2
tree2f1544feb6455fc51c608b1f6cccbc34b7827e91tree | snapshot
parent79c4c22e1570cf0d73bacb4d292951e614d0ab2fcommit | diff
aarch64: fix mode switching

DCPS only allows to enter higher ELs, for lower ELs you need to
use DRPS. Also, of course the encoding differs between A64 and T32.
Both DCPS and DRPS also clobber DLR and DSPSR, which then need to be
restored on resume.

Change-Id: Ifa3dcfa94212702e57170bd59fd0bb25495fb6fd
Signed-off-by: Matthias Welwarsky <matthias.welwarsky@sysgo.com>
src/target/aarch64.c diff | blob | history
src/target/armv8.c diff | blob | history
src/target/armv8_dpm.c diff | blob | history
src/target/armv8_dpm.h diff | blob | history
src/target/armv8_opcodes.c diff | blob | history
src/target/armv8_opcodes.h diff | blob | history
Cloned from https://git.code.sf.net/p/openocd/code