git.sur5r.net Git - openocd/commit

]> git.sur5r.net Git - openocd/commit

author	oharboe <oharboe@b42882b7-edfa-0310-969c-e2dbd0fdcd60>
	Wed, 16 Apr 2008 09:17:22 +0000 (09:17 +0000)
committer	oharboe <oharboe@b42882b7-edfa-0310-969c-e2dbd0fdcd60>
	Wed, 16 Apr 2008 09:17:22 +0000 (09:17 +0000)
commit	c333611f2b15e7f4e9462f7d4376bbf922bf65a4
tree	15c20daf0b6378007cdff388c87c678b00395322	tree \| snapshot
parent	c9dfba18668b336b4067e80355b3d79d828a3258	commit \| diff

Update Embedded ICE registers explicitly during target->type->examine() instead
of as a side effect of target->type->poll(). This makes it clearer when things
happen during reset/examine.

git-svn-id: svn://svn.berlios.de/openocd/trunk@585 b42882b7-edfa-0310-969c-e2dbd0fdcd60

Cloned from https://git.code.sf.net/p/openocd/code

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src/target/arm7_9_common.c		diff \| blob \| history
src/target/arm7_9_common.h		diff \| blob \| history
src/target/arm7tdmi.c		diff \| blob \| history
src/target/arm9tdmi.c		diff \| blob \| history
src/target/etm.h		diff \| blob \| history