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(parent: 4e27305) | patch
zy1000: use correct base clock when calculating speed divisor
authorØyvind Harboe <oyvind.harboe@zylin.com>
Mon, 2 Aug 2010 20:12:33 +0000 (22:12 +0200)
committerØyvind Harboe <oyvind.harboe@zylin.com>
Mon, 2 Aug 2010 20:22:03 +0000 (22:22 +0200)
commitc49d4c9f7f43979e3abf04067dc38535f7ebc45a
tree04aa9bc6937cc3d7bc02f6aff6abb166421425c7tree | snapshot
parent4e27305ed5dac23e8b9a43e43b4b908dc53a0a20commit | diff
zy1000: use correct base clock when calculating speed divisor

revc uses 60MHz and revb 64MHz, use this in calculations.

Signed-off-by: Øyvind Harboe <oyvind.harboe@zylin.com>
src/jtag/zy1000/zy1000.c diff | blob | history
Cloned from https://git.code.sf.net/p/openocd/code