]> git.sur5r.net Git - openocd/commit
target/arm_dpm: prevent endless loop in arm_dpm_full_context()
authorPaul Fertser <fercerpav@gmail.com>
Sun, 31 Aug 2014 07:04:39 +0000 (11:04 +0400)
committerSpencer Oliver <spen@spen-soft.co.uk>
Mon, 22 Sep 2014 19:38:01 +0000 (19:38 +0000)
commite77b7447f7b30d70961e5bee45400f70baeb16fc
tree39529cb6070b3d8ab1e9ac103a4a426d4553dda3
parent447fb25324f1e9112523ef78825f8dadf3c7ddb7
target/arm_dpm: prevent endless loop in arm_dpm_full_context()

The code treats registers that are shadowed in FIQ mode in a special
way: to read them out the target is first switches to USR mode. But
since USR != ANY the current implementation later skips register read,
and the loop becomes endless in case any !valid ARM_MODE_ANY is
present at the moment arm_dpm_full_context() is called. This was
reported in https://sourceforge.net/p/openocd/tickets/76/. The issue
surfaced because 2efb1f14f611f2ff8a380b703f3e8bcb8a95d1ad added two
ARM_MODE_ANY registers ("sp" and "lr") which were not normally read,
so at the time a user was calling "arm reg" they were not valid.

Fix this by changing the mode appropriately while keeping the "mode"
variable state intact so it would later match register's mode.

Compile-tested only.

Change-Id: I01840e8fa20ec392220138a3f1497ac25deb080a
Signed-off-by: Paul Fertser <fercerpav@gmail.com>
Reviewed-on: http://openocd.zylin.com/2278
Tested-by: jenkins
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
src/target/arm_dpm.c