]> git.sur5r.net Git - freertos/commit
Prepare the RISC-V port layer for addition of 64-bit port.
authorrtel <rtel@1d2547de-c912-0410-9cb9-b8ca96c0e9e2>
Fri, 8 Mar 2019 17:03:43 +0000 (17:03 +0000)
committerrtel <rtel@1d2547de-c912-0410-9cb9-b8ca96c0e9e2>
Fri, 8 Mar 2019 17:03:43 +0000 (17:03 +0000)
commited36590113fb846a2c38739e7d35bf46483f149b
tree361945a899d55610b939d3cd61f17f7e4f79477f
parent6b7a5cca0b93511acff5c89a812b28baa75c596a
Prepare the RISC-V port layer for addition of 64-bit port.

git-svn-id: https://svn.code.sf.net/p/freertos/code/trunk@2644 1d2547de-c912-0410-9cb9-b8ca96c0e9e2
FreeRTOS/Source/portable/GCC/RISC-V/portASM.S