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(parent: ad70206) | patch
Rework RISC-V portASM.S to make it easier to add in chip specific RISC-V extensions...
authorrtel <rtel@1d2547de-c912-0410-9cb9-b8ca96c0e9e2>
Sun, 16 Dec 2018 23:59:49 +0000 (23:59 +0000)
committerrtel <rtel@1d2547de-c912-0410-9cb9-b8ca96c0e9e2>
Sun, 16 Dec 2018 23:59:49 +0000 (23:59 +0000)
commitbf8e20a60bb367f516b003a181090b42f579659d
tree277e7e9570cd1287a0da1630ca5ca5903590c4b7tree | snapshot
parentad70206f8eabd0abaf240f5c4e33e65c9c9d4dbecommit | diff
Rework RISC-V portASM.S to make it easier to add in chip specific RISC-V extensions and accommodate chips that don't include the CLINT.

git-svn-id: https://svn.code.sf.net/p/freertos/code/trunk@2604 1d2547de-c912-0410-9cb9-b8ca96c0e9e2
FreeRTOS/Source/portable/GCC/RISC-V-RV32/CLINT/freertos_risc_v_port_specific_extensions.h [new file with mode: 0644] blob
FreeRTOS/Source/portable/GCC/RISC-V-RV32/portASM.S diff | blob | history
FreeRTOS imported from SF.net SVN