Remove needless debug handler state.
- "handler_installed" became wrong as soon as the second TRST+SRST
reset was issued ... so the handler was never reloaded after the
reset removed it from the mini-icache.
This fixes the bug where subsequent resets fail on PXA255 (if the
first one even worked, which is uncommon). Other XScale chips
would have problems too; PXA270 seems to have, IXP425 maybe not.
- "handler_running" was never tested; it's pointless.
Plus a related bugfix: invalidate OpenOCD's ARM register cache on reset.
It was no more valid than the XScale's mini-icache. (Though ... such
invalidations might be better done in "SRST asserted" callbacks.)
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
static int xscale_poll(target_t *target)
{
int retval = ERROR_OK;
static int xscale_poll(target_t *target)
{
int retval = ERROR_OK;
- armv4_5_common_t *armv4_5 = target->arch_info;
- xscale_common_t *xscale = armv4_5->arch_info;
if ((target->state == TARGET_RUNNING) || (target->state == TARGET_DEBUG_RUNNING))
{
if ((target->state == TARGET_RUNNING) || (target->state == TARGET_DEBUG_RUNNING))
{
{
/* there's data to read from the tx register, we entered debug state */
{
/* there's data to read from the tx register, we entered debug state */
- xscale->handler_running = 1;
-
target->state = TARGET_HALTED;
/* process debug entry, fetching current mode regs */
target->state = TARGET_HALTED;
/* process debug entry, fetching current mode regs */
LOG_DEBUG("target resumed");
LOG_DEBUG("target resumed");
- xscale->handler_running = 1;
-
breakpoint = breakpoint->next;
}
breakpoint = breakpoint->next;
}
- if (!xscale->handler_installed)
+ armv4_5_invalidate_core_regs(target);
+
+ /* FIXME mark hardware watchpoints got unset too. Also,
+ * at least some of the XScale registers are invalid...
+ */
+
+ /*
+ * REVISIT: *assumes* we had a SRST+TRST reset so the mini-icache
+ * contents got invalidated. Safer to force that, so writing new
+ * contents can't ever fail..
+ */
{
uint32_t address;
unsigned buf_cnt;
{
uint32_t address;
unsigned buf_cnt;
* it's using halt mode (not monitor mode), it runs in
* "Special Debug State" for access to registers, memory,
* coprocessors, trace data, etc.
* it's using halt mode (not monitor mode), it runs in
* "Special Debug State" for access to registers, memory,
* coprocessors, trace data, etc.
- *
- * REVISIT: *assumes* we've had a SRST+TRST reset so the
- * mini-icache contents have been invalidated. Safest to
- * force that, so writing new contents is reliable...
*/
address = xscale->handler_address;
for (unsigned binary_size = sizeof xscale_debug_handler - 1;
*/
address = xscale->handler_address;
for (unsigned binary_size = sizeof xscale_debug_handler - 1;
xscale_resume(target, 1, 0x0, 1, 0);
}
}
xscale_resume(target, 1, 0x0, 1, 0);
}
}
- else
- {
- jtag_add_reset(0, 0);
- }
}
/* the debug handler isn't installed (and thus not running) at this time */
}
/* the debug handler isn't installed (and thus not running) at this time */
- xscale->handler_installed = 0;
- xscale->handler_running = 0;
xscale->handler_address = 0xfe000800;
/* clear the vectors we keep locally for reference */
xscale->handler_address = 0xfe000800;
/* clear the vectors we keep locally for reference */
reg_cache_t *reg_cache;
/* current state of the debug handler */
reg_cache_t *reg_cache;
/* current state of the debug handler */
- int handler_installed;
- int handler_running;
uint32_t handler_address;
/* target-endian buffers with exception vectors */
uint32_t handler_address;
/* target-endian buffers with exception vectors */