Tidy up the MicoBlaze port layer - still a work in progress.

git-svn-id: https://svn.code.sf.net/p/freertos/code/trunk@1448 1d2547de-c912-0410-9cb9-b8ca96c0e9e2

diff --git a/Demo/MicroBlaze_Spartan-6_EthernetLite/SDKProjects/RTOSDemoSource/FreeRTOS_Source/portable/GCC/MicroBlaze/port.c b/Demo/MicroBlaze_Spartan-6_EthernetLite/SDKProjects/RTOSDemoSource/FreeRTOS_Source/portable/GCC/MicroBlaze/port.c
index fad034c36809454a05b6b2b4258250c64b233150..77a69fec3a2ee4c8de21875a9d6b893fff6ddaef 100644 (file)
--- a/Demo/MicroBlaze_Spartan-6_EthernetLite/SDKProjects/RTOSDemoSource/FreeRTOS_Source/portable/GCC/MicroBlaze/port.c
+++ b/Demo/MicroBlaze_Spartan-6_EthernetLite/SDKProjects/RTOSDemoSource/FreeRTOS_Source/portable/GCC/MicroBlaze/port.c
@@ -77,13 +77,6 @@ to the scheduler being commenced we don't want the critical nesting level
 to reach zero, so it is initialised to a high value. */\r
 #define portINITIAL_NESTING_VALUE      ( 0xff )\r
 \r
 to reach zero, so it is initialised to a high value. */\r
 #define portINITIAL_NESTING_VALUE      ( 0xff )\r
 \r

-/* Our hardware setup only uses one counter. */\r
-#define portCOUNTER_0                          0\r
-\r
-/* The stack used by the ISR is filled with a known value to assist in\r
-debugging. */\r
-#define portISR_STACK_FILL_VALUE       0x55555555\r
-\r

 /*-----------------------------------------------------------*/\r
 \r
 /*\r
 /*-----------------------------------------------------------*/\r
 \r
 /*\r


@@ -231,26 +224,19 @@ const unsigned long ulR13 = ( unsigned long ) &_SDA_BASE_;
 \r
 portBASE_TYPE xPortStartScheduler( void )\r
 {\r
 \r
 portBASE_TYPE xPortStartScheduler( void )\r
 {\r

-extern void ( vStartFirstTask )( void );\r
+extern void ( vPortStartFirstTask )( void );\r
+extern unsigned long *_stack;\r

 \r
        /* Setup the hardware to generate the tick.  Interrupts are disabled when\r
        this function is called. */\r
        vApplicationSetupTimerInterrupt();\r
 \r
        /* Allocate the stack to be used by the interrupt handler. */\r
 \r
        /* Setup the hardware to generate the tick.  Interrupts are disabled when\r
        this function is called. */\r
        vApplicationSetupTimerInterrupt();\r
 \r
        /* Allocate the stack to be used by the interrupt handler. */\r

-       pulISRStack = ( unsigned long * ) pvPortMalloc( configINTERRUPT_STACK_SIZE * sizeof( portSTACK_TYPE ) );\r
-       configASSERT( pulISRStack != NULL );\r
+       pulISRStack = _stack;\r

 \r
 \r

-       /* Restore the context of the first task that is going to run. */\r
-       if( pulISRStack != NULL )\r
-       {\r
-               /* Fill the ISR stack with a known value to facilitate debugging. */\r
-               memset( pulISRStack, portISR_STACK_FILL_VALUE, configMINIMAL_STACK_SIZE * sizeof( portSTACK_TYPE ) );\r
-               pulISRStack += ( configMINIMAL_STACK_SIZE - 1 );\r
-\r
-               /* From here on, the created tasks will be executing. */\r
-               vStartFirstTask();\r
-       }\r
+       /* Restore the context of the first task that is going to run.  From here\r
+       on, the created tasks will be executing. */\r
+       vPortStartFirstTask();\r

 \r
        /* Should not get here as the tasks are now running! */\r
        return pdFALSE;\r
 \r
        /* Should not get here as the tasks are now running! */\r
        return pdFALSE;\r

diff --git a/Demo/MicroBlaze_Spartan-6_EthernetLite/SDKProjects/RTOSDemoSource/FreeRTOS_Source/portable/GCC/MicroBlaze/portasm.s b/Demo/MicroBlaze_Spartan-6_EthernetLite/SDKProjects/RTOSDemoSource/FreeRTOS_Source/portable/GCC/MicroBlaze/portasm.s
index c015eed06628ffd3c7307972fae7db6bfeb6504c..cf03909b7f253ebafc6ea02ce88fc98cf12c8296 100644 (file)
--- a/Demo/MicroBlaze_Spartan-6_EthernetLite/SDKProjects/RTOSDemoSource/FreeRTOS_Source/portable/GCC/MicroBlaze/portasm.s
+++ b/Demo/MicroBlaze_Spartan-6_EthernetLite/SDKProjects/RTOSDemoSource/FreeRTOS_Source/portable/GCC/MicroBlaze/portasm.s
@@ -63,19 +63,22 @@
        .extern uxCriticalNesting\r
        .extern pulISRStack\r
 \r
        .extern uxCriticalNesting\r
        .extern pulISRStack\r
 \r

-/*     .global vPortFreeRTOSInterruptHandler */\r

        .global _interrupt_handler\r
        .global VPortYieldASM\r
        .global _interrupt_handler\r
        .global VPortYieldASM\r

-       .global vStartFirstTask\r
+       .global vPortStartFirstTask\r

 \r
 \r
 .macro portSAVE_CONTEXT\r
 \r
 \r
 .macro portSAVE_CONTEXT\r

+\r

        /* Make room for the context on the stack. */\r
        addik r1, r1, -132\r
        /* Make room for the context on the stack. */\r
        addik r1, r1, -132\r

-       /* Save r31 so it can then be used. */\r
+\r
+       /* Save r31 so it can then be used as a temporary. */\r

        swi r31, r1, 4\r
        swi r31, r1, 4\r

+\r

        /* Copy the msr into r31 - this is stacked later. */\r
        mfs r31, rmsr\r
        /* Copy the msr into r31 - this is stacked later. */\r
        mfs r31, rmsr\r

+\r

        /* Stack general registers. */\r
        swi r30, r1, 12\r
        swi r29, r1, 16\r
        /* Stack general registers. */\r
        swi r30, r1, 12\r
        swi r29, r1, 16\r


@@ -105,9 +108,11 @@
        swi r4, r1, 116\r
        swi r3, r1, 120\r
        swi r2, r1, 124\r
        swi r4, r1, 116\r
        swi r3, r1, 120\r
        swi r2, r1, 124\r

+\r

        /* Stack the critical section nesting value. */\r
        lwi r3, r0, uxCriticalNesting\r
        swi r3, r1, 128\r
        /* Stack the critical section nesting value. */\r
        lwi r3, r0, uxCriticalNesting\r
        swi r3, r1, 128\r

+\r

        /* Save the top of stack value to the TCB. */\r
        lwi r3, r0, pxCurrentTCB\r
        sw      r1, r0, r3\r
        /* Save the top of stack value to the TCB. */\r
        lwi r3, r0, pxCurrentTCB\r
        sw      r1, r0, r3\r


@@ -115,9 +120,11 @@
        .endm\r
 \r
 .macro portRESTORE_CONTEXT\r
        .endm\r
 \r
 .macro portRESTORE_CONTEXT\r

+\r

        /* Load the top of stack value from the TCB. */\r
        lwi r3, r0, pxCurrentTCB\r
        lw      r1, r0, r3      \r
        /* Load the top of stack value from the TCB. */\r
        lwi r3, r0, pxCurrentTCB\r
        lw      r1, r0, r3      \r

+\r

        /* Restore the general registers. */\r
        lwi r31, r1, 4          \r
        lwi r30, r1, 12         \r
        /* Restore the general registers. */\r
        lwi r31, r1, 4          \r
        lwi r30, r1, 12         \r


@@ -149,38 +156,30 @@
        lwi r4, r1, 116\r
        lwi r2, r1, 124\r
 \r
        lwi r4, r1, 116\r
        lwi r2, r1, 124\r
 \r

+       /* Reload the rmsr from the stack. */\r
+       lwi r3, r1, 8\r
+       mts rmsr, r3\r
+\r

        /* Load the critical nesting value. */\r
        lwi r3, r1, 128\r
        swi r3, r0, uxCriticalNesting\r
 \r
        /* Load the critical nesting value. */\r
        lwi r3, r1, 128\r
        swi r3, r0, uxCriticalNesting\r
 \r

-       /* Obtain the MSR value from the stack. */\r
-       lwi r3, r1, 8\r
+       /* Test the critical nesting value.  If it is non zero then the task last\r
+       exited the running state using a yield.  If it is zero, then the task\r
+       last exited the running state through an interrupt. */\r
+       xori r3, r3, 0\r
+       bnei r3, exit_from_yield\r

 \r
 \r

-       /* Are interrupts enabled in the MSR?  If so return using an return from \r
-       interrupt instruction to ensure interrupts are enabled only once the task\r
-       is running again. */\r
-       andi r3, r3, 2\r
-       beqid r3, 36\r
-       or r0, r0, r0\r
-\r
-       /* Reload the rmsr from the stack, clear the enable interrupt bit in the\r
-       value before saving back to rmsr register, then return enabling interrupts\r
-       as we return. */\r
-       lwi r3, r1, 8\r
-       andi r3, r3, ~2\r
-       mts rmsr, r3\r
+       /* r3 was being used as a temporary.  Now restore its true value from the\r
+       stack. */\r

        lwi r3, r1, 120\r
        lwi r3, r1, 120\r

-       addik r1, r1, 132\r
-       rtid r14, 0\r
-       or r0, r0, r0\r

 \r
 \r

-       /* Reload the rmsr from the stack, place it in the rmsr register, and\r
-       return without enabling interrupts. */\r
-       lwi r3, r1, 8\r
-       mts rmsr, r3\r
-       lwi r3, r1, 120\r
+       /* Remove the stack frame. */\r

        addik r1, r1, 132\r
        addik r1, r1, 132\r

-       rtsd r14, 0\r
+\r
+       /* Return using rtid so interrupts are re-enabled as this function is\r
+       exited. */\r
+       rtid r14, 0\r

        or r0, r0, r0\r
 \r
        .endm\r
        or r0, r0, r0\r
 \r
        .endm\r


@@ -188,41 +187,68 @@
        .text\r
        .align  2\r
 \r
        .text\r
        .align  2\r
 \r

+/* This function is used to exit portRESTORE_CONTEXT() if the task being\r
+returned to last left the Running state by calling taskYIELD() (rather than\r
+being preempted by an interrupt. */\r
+exit_from_yield:\r
+\r
+       /* r3 was being used as a temporary.  Now restore its true value from the\r
+       stack. */\r
+       lwi r3, r1, 120\r
+\r
+       /* Remove the stack frame. */\r
+       addik r1, r1, 132\r
+\r
+       /* Return to the task. */\r
+       rtsd r14, 0\r
+       or r0, r0, r0\r
+\r

 \r
 \r

-/*vPortFreeRTOSInterruptHandler:*/\r

 _interrupt_handler:\r
 _interrupt_handler:\r

+\r

        portSAVE_CONTEXT\r
        portSAVE_CONTEXT\r

-       /* Entered via an interrupt so interrupts must be enabled in msr. */\r
-       ori r31, r31, 2\r
+\r

        /* Stack msr. */\r
        swi r31, r1, 8\r
        /* Stack msr. */\r
        swi r31, r1, 8\r

-       /* Stack the return address.  As we entered via an interrupt we do\r
-       not need to modify the return address prior to stacking. */\r
+\r
+       /* Stack the return address. */\r

        swi r14, r1, 76\r
        swi r14, r1, 76\r

-       /* Now switch to use the ISR stack. */\r
-       lwi r3, r0, pulISRStack\r
-       add r1, r3, r0\r
+\r
+       /* Switch to the ISR stack. */\r
+       lwi r1, r0, pulISRStack\r
+\r
+       /* Execute any pending interrupts. */\r

        bralid r15, XIntc_DeviceInterruptHandler\r
        or r0, r0, r0\r
        bralid r15, XIntc_DeviceInterruptHandler\r
        or r0, r0, r0\r

+\r
+       /* Restore the context of the next task scheduled to execute. */\r

        portRESTORE_CONTEXT\r
 \r
 \r
 VPortYieldASM:\r
        portRESTORE_CONTEXT\r
 \r
 \r
 VPortYieldASM:\r

+\r

        portSAVE_CONTEXT\r
        portSAVE_CONTEXT\r

+\r

        /* Stack msr. */\r
        swi r31, r1, 8\r
        /* Stack msr. */\r
        swi r31, r1, 8\r

-       /* Modify the return address so we return to the instruction after the\r
-       exception. */\r
+\r
+       /* Modify the return address so a return is done to the instruction after\r
+       the call to VPortYieldASM. */\r

        addi r14, r14, 8\r
        swi r14, r1, 76\r
        addi r14, r14, 8\r
        swi r14, r1, 76\r

-       /* Now switch to use the ISR stack. */\r
-       lwi r3, r0, pulISRStack\r
-       add r1, r3, r0\r
+\r
+       /* Switch to use the ISR stack. */\r
+       lwi r1, r0, pulISRStack\r
+\r
+       /* Select the next task to execute. */\r

        bralid r15, vTaskSwitchContext\r
        or r0, r0, r0\r
        bralid r15, vTaskSwitchContext\r
        or r0, r0, r0\r

+\r
+       /* Restore the context of the next task scheduled to execute. */\r

        portRESTORE_CONTEXT\r
 \r
        portRESTORE_CONTEXT\r
 \r

-vStartFirstTask:\r
+vPortStartFirstTask:\r
+\r

        portRESTORE_CONTEXT\r
        \r
        \r
        portRESTORE_CONTEXT\r
        \r
        \r

diff --git a/Demo/MicroBlaze_Spartan-6_EthernetLite/SDKProjects/RTOSDemoSource/main-blinky.c b/Demo/MicroBlaze_Spartan-6_EthernetLite/SDKProjects/RTOSDemoSource/main-blinky.c
index 8ec39211f33eb29f616c4ab10360fb7a0bfcf3d3..d16a459626ccd803156071c4879e03d90f6762d5 100644 (file)
--- a/Demo/MicroBlaze_Spartan-6_EthernetLite/SDKProjects/RTOSDemoSource/main-blinky.c
+++ b/Demo/MicroBlaze_Spartan-6_EthernetLite/SDKProjects/RTOSDemoSource/main-blinky.c
@@ -428,7 +428,8 @@ void vApplicationSetupTimerInterrupt( void )
 {\r
 portBASE_TYPE xStatus;\r
 const unsigned char ucTimerCounterNumber = ( unsigned char ) 0U;\r
 {\r
 portBASE_TYPE xStatus;\r
 const unsigned char ucTimerCounterNumber = ( unsigned char ) 0U;\r

-const unsigned long ulCounterValue = ( ( XPAR_AXI_TIMER_0_CLOCK_FREQ_HZ / configTICK_RATE_HZ ) - 1UL );\r
+//const unsigned long ulCounterValue = ( ( XPAR_AXI_TIMER_0_CLOCK_FREQ_HZ / configTICK_RATE_HZ ) - 1UL );\r
+const unsigned long ulCounterValue = ( ( ( XPAR_AXI_TIMER_0_CLOCK_FREQ_HZ / configTICK_RATE_HZ ) - 1UL ) ) * 2UL; //_RB_ there is a clock set up incorrectly somwehre, the *2 should not be required. */\r

 extern void vTickISR( void *pvUnused );\r
 \r
        /* Initialise the timer/counter. */\r
 extern void vTickISR( void *pvUnused );\r
 \r
        /* Initialise the timer/counter. */\r


@@ -475,4 +476,17 @@ unsigned long ulCSR;
        ulCSR = XTmrCtr_GetControlStatusReg( XPAR_AXI_TIMER_0_BASEADDR, 0 );\r
        XTmrCtr_SetControlStatusReg( XPAR_AXI_TIMER_0_BASEADDR, 0, ulCSR );\r
 }\r
        ulCSR = XTmrCtr_GetControlStatusReg( XPAR_AXI_TIMER_0_BASEADDR, 0 );\r
        XTmrCtr_SetControlStatusReg( XPAR_AXI_TIMER_0_BASEADDR, 0, ulCSR );\r
 }\r

+/*-----------------------------------------------------------*/\r
+\r
+void vAssertCalled( char *pcFile, long lLine )\r
+{\r
+volatile unsigned long ul = 1;\r

 \r
 \r

+       taskDISABLE_INTERRUPTS();\r
+       while( ul == 1 )\r
+       {\r
+               /* Just for somewhere to put a breakpoint. */\r
+               portNOP();\r
+       }\r
+       taskENABLE_INTERRUPTS();\r
+}\r

diff --git a/Demo/MicroBlaze_Spartan-6_EthernetLite/SDKProjects/RTOSDemoSource/main-full.c b/Demo/MicroBlaze_Spartan-6_EthernetLite/SDKProjects/RTOSDemoSource/main-full.c
index 78e9c77749ff27d532c6b7089cfdbb32da54c73b..97e1c48da2aa93366e00a93e7e10290b29e74b31 100644 (file)
--- a/Demo/MicroBlaze_Spartan-6_EthernetLite/SDKProjects/RTOSDemoSource/main-full.c
+++ b/Demo/MicroBlaze_Spartan-6_EthernetLite/SDKProjects/RTOSDemoSource/main-full.c
@@ -546,7 +546,7 @@ const unsigned char ucSetToOutput = 0U;
 }\r
 /*-----------------------------------------------------------*/\r
 \r
 }\r
 /*-----------------------------------------------------------*/\r
 \r

-extern void vAssertCalled( char *pcFile, long lLine )\r
+void vAssertCalled( char *pcFile, long lLine )\r

 {\r
 volatile unsigned long ul = 1;\r
 \r
 {\r
 volatile unsigned long ul = 1;\r
 \r